MIMXRT8024DVL4A datasheet(27/103 Pages) NXP

27 / 103 page

• VDD_SNVS_IN supply must be turned off after any other power supply or be connected (shorted) with VDD_HIGH_IN supply.

• If a coin cell is used to power VDD_SNVS_IN, then ensure that it is removed after any other supply is switched off.

4.2.1.3 Power supplies usage

All I/O pins should not be externally driven while the I/O power supply for the pin (NVCC_xxx) is OFF. This can cause internal

latch-up and malfunctions due to reverse current flows. For information about I/O power supply of each pin, see "Power Rail"

columns in pin list tables of Package information and contact assignments.

4.2.2 Integrated LDO voltage regulator parameters

Various internal supplies can be powered ON from internal LDO voltage regulators. All the supply pins named *_CAP must be

connected to external capacitors. The on-board LDOs are intended for internal use only and should not be used to power any

external circuitry. See the

i.MX RT1060X Reference Manual (IMXRT1060XRM) for details on the power tree scheme.

The *_CAP signals should not be powered externally. These signals are intended for internal LDO operation only.

NOTE

4.2.2.1 Digital regulators (LDO_SNVS)

There are one digital LDO regulator ("Digital", because of the logic loads that they drive, not because of their construction). The

advantages of the regulator is to reduce the input supply variation because of its input supply ripple rejection and its on-die

trimming. This translates into more stable voltage for the on-chip logics.

The regulator has two basic modes:

• Power Gate. The regulation FET is switched fully off limiting the current draw from the supply. The analog part of the regulator

is powered down here limiting the power consumption.

• Analog regulation mode. The regulation FET is controlled such that the output voltage of the regulator equals the

target voltage.

For additional information, see the

i.MX RT1060X Reference Manual (IMXRT1060XRM).

4.2.2.2 Regulators for analog modules

4.2.2.2.1 LDO_1P1

The LDO_1P1 regulator implements a programmable linear-regulator function from VDD_HIGH_IN (see Table 9 for minimum and

maximum input requirements). Typical Programming Operating Range is 1.0 V to 1.2 V with the nominal default setting as 1.1

V. The LDO_1P1 supplies the USB PHY, and PLLs. A programmable brown-out detector is included in the regulator that can

be used by the system to determine when the load capability of the regulator is being exceeded to take the necessary steps.

Current-limiting can be enabled to allow for in-rush current requirements during start-up, if needed. Active-pull-down can also be

enabled for systems requiring this feature.

For additional information, see the

i.MX RT1060X Reference Manual (IMXRT1060XRM).

4.2.2.2.2 LDO_2P5

The LDO_2P5 module implements a programmable linear-regulator function from VDD_HIGH_IN (see Table 9 for minimum and

maximum input requirements). Typical Programming Operating Range is 2.25 V to 2.75 V with the nominal default setting as 2.5

V. LDO_2P5 supplies the USB PHY, E-fuse module, and PLLs. A programmable brown-out detector is included in the regulator

that can be used by the system to determine when the load capability of the regulator is being exceeded, to take the necessary

steps. Current-limiting can be enabled to allow for in-rush current requirements during start-up, if needed. Active-pull-down can

also be enabled for systems requiring this feature. An alternate self-biased low-precision weak-regulator is included that can be

enabled for applications needing to keep the output voltage alive during low-power modes where the main regulator driver and its

associated global bandgap reference module are disabled. The output of the weak-regulator is not programmable and is a function

NXP Semiconductors

Electrical Characteristics

i.MX RT1060X Crossover Processors for Extended Products , Rev. 1, 06/2022

Data Sheet: Technical Data

27 / 103

MIMXRT8024DVL4A Datasheet(PDF) 27 Page - NXP Semiconductors

MIMXRT8024DVL4A Datasheet(HTML) 27 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL