HC805K3GRSSLASHD datasheet(112/119 Pages) NXP

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General Release Speciﬁcation

3.0 Volt DC Electrical Characteristics1

MC68HC805K3 — Rev. 1.0

112

Electrical Specifications

12.6 3.0 Volt DC Electrical Characteristics1

Characteristic

Symbol

Min

Typ

Max

Unit

Output High Voltage (I

LOAD = –0.4 mA)

PA7–PA0, PB1/OSC3, PB0

DD –0.3

—

Output Low Voltage

PA3–PA0, PB1/OSC3, PB0 (I

LOAD = 0.4 mA)

PA7–PA4 (I

LOAD = 3.0 mA)

—

0.3

Input High Voltage

PA0–PA7, PB0, PB1/OSC3, IRQ, RESET, OSC1

0.7 x V

—V

Input Low Voltage

PA0–PA7, PB0, PB1/OSC3, IRQ, RESET, OSC1

—

0.2 x V

Supply Current (f

OP = 1 MHz, see Notes 4–8)

Run

Wait

Stop

°C

°C to +70 °C (Standard)

–40

°C to +85 °C (Extended)

—

2.0

0.75

200

275

300

I/O Ports Hi-Z Leakage Current

PA0–PA7, PB0–PB1

(Without Individual Pulldown Activated)

IIL

——

µA

Input Pulldown Current

PA0–PA7, PB0–PB1

IIL

100

µA

Input Current

IRQ, OSC1

RESET (VIN = VIH)

RESET (VIN = VIL)

—

µA

RESET, Internal Pulldown Device

0.2

2.0

4.0

Capacitance

Ports (As Input or Output)

RESET, IRQ, OSC1, OSC2

OUT

—

Crystal/Ceramic Resonator

Oscillator Mode Internal Resistor

OSC1 to OSC2

OSC

1.0

2.0

3.0

Ω

NOTES:

1. VDD = 3.0 Vdc ± 0.5 Vdc, VSS = 0 Vdc, TA = –40 °C to +85 °C, unless otherwise note

2. All values shown reﬂect average measurements.

3. Typical values at midpoint of voltage range, 25

°C only.

4. Wait I

DD: Only timer system active

5. Run (Operating) I

DD, Wait IDD: Measured using external square wave clock source to OSC1, all inputs 0.2 Vdc

from rail; no DC loads, less than 50 pF on all outputs, C

L = 20 pF on OSC2.

6. Wait, Stop I

DD: All ports conﬁgured as inputs, VIL = 0.2 Vdc, V

IH = VDD –0.2 Vdc.

7. Stop I

DD measured with OSC1 = VDD, RESET open

8. Wait I

DD is affected linearly by the OSC2 capacitance.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC805K3GRS/D Datasheet(PDF) 112 Page - NXP Semiconductors

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