S32K311NHT0MPAST datasheet(16/143 Pages) NXP

16 / 143 page

Table 1. S32K3xx chip's feature comparison (continued)

Feature

Chip

S32K310 S32K311 S32K312 S32K322 S32K341 S32K342 S32K314 S32K324 S32K344 S32K328 S32K338 S32K348 S32K358 S32K3881

eMIOS

instances

RTC

instances

289-ball

MAPBGA

package

Yes

257-ball

MAPBGA

package

Yes

172-

HDQFP

package

Yes

172-

HDQFP -

package

Yes

100-

HDQFP

package

Yes

48-pin

LQFP

package

Yes

1. This feature set is under evaluation and subject to change.

2. ASIL-B and ASIL-D performance is available simultaneously. ASIL-D performance can also be used for ASIL-B performance.

3. The first result abides by all of the "ground rules" out in Dhrystone documentation, the second permits inlining of functions, not just permitted C strings libraries,

while the third additionally permits simultaneous ("multi-file") compilation. All are with the original (K and R) v2.1 of Dhrystone. Arm Compiler 6.17. See https://

developer.arm.com/Processors/Cortex-M7 for details.

4. Core configuration is 2xLS + 1 independent core

5. Core configuration is 1xLS + 3 independent cores

6. Results depends on specific compiler version, contact NXP sales representative for more details.

7. 4-bit data width, SDR mode only

8. 8-bit data width, SDR and DDR mode

S32K311NHT0MPAST Datasheet(PDF) 16 Page - NXP Semiconductors

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