S32K311NHT0MPAST datasheet(54/143 Pages) NXP

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Table 18. RUN mode supply currents (peripherals disabled) for S32K312, S32K311, S32K310

Chip

Ambient

Temperature (°C)

RUN Mode (mA) 1

Min. Config. 2

Single Core @80 MHz

[Clock Option F]

Min. Config. 2

Single Core @120 MHz

[Clock Option B]

S32K312

25, typ 6

25, max 7

85, typ 6

85, max 7

58.5

59.7

105, typ 6

48.1

48.7

105, max 7

76.4

77.8

125, typ 6

56.5

125, max 7, 8, 9

98.7

99.9

S32K311 , S32K310

25, typ 6

34.9

36.5

25, max 7

39.1

41.1

85, typ 6

38.1

39.8

85, max 7

54.2

55.9

105, typ 6

41.5

43.2

105, max 7

69.1

71.1

125, typ 6

47.7

49.4

125, max 7, 8, 9

99.1

1. Current numbers are for reduced configuration and may vary based on user configuration and silicon process variation.

2. See the configurations in Table 22.

3. IO load current is not included. The actual current requirements for IOs will depend on the I/O configuration in the

application.

4. RUN IDD @ VDD_HV_A includes Flash memory read current from the V25 voltage rail.

5. RUN IDD @ V15 includes Flash memory read current from the V11 voltage rail.

6. “typ” is indicative of the average current numbers at the nominal internally regulated V11 supply voltage, VDD_HV_A =

5.0V, VDD_HV_B = 5.0V, V15 = 1.5V, for the typical silicon process.

7. “max” is indicative of the maximum current numbers at the maximum internally regulated V11 supply voltage (1.16 V),

VDD_HV_A = 5.5V, VDD_HV_B = 5.5V, V15 = 1.65V, for the fast silicon process.

NXP Semiconductors

Power management

S32K3xx Data Sheet, Rev. 9.1, 03/2024

Data Sheet: Technical Data

Preliminary Information for S32K388

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