S32K311NHT0MPAST datasheet(3/143 Pages) NXP

3 / 143 page

Contents

Overview............................................................ 5

Block diagram.....................................................5

Feature comparison......................................... 12

Ordering information.........................................17

4.1

Determining valid orderable parts ................ 17

General.............................................................17

5.1

Absolute maximum ratings............................18

5.2

Voltage and current operating requirements.20

5.3

Thermal operating characteristics.................22

5.4

ESD and Latch-up Protection Characteristics

...................................................................... 22

Power management......................................... 23

6.1

Power mode transition operating behaviors..23

6.1.1

Power mode transition operating behavior... 23

6.1.2

Boot time, HSE firmware not installed.......... 24

6.1.3

Boot time, HSE firmware installed................ 24

6.1.4

HSE firmware memory verification time

examples.......................................................25

6.2

Supply Monitoring......................................... 29

6.3

Recommended Decoupling Capacitors........ 31

6.3.1

Recommended Decoupling Capacitor

diagrams....................................................... 32

6.4

V15 regulator (SMPS option) electrical

specifications................................................ 43

6.5

V15 regulator (BJT option, NPN ballast

transistor control) electrical specifications.... 45

6.6

V11 regulator (NMOS ballast transistor control)

electrical specifications................................. 45

6.7

Supply currents............................................. 46

6.8

Operating mode............................................ 58

6.9

Cyclic wake-up current .................................60

I/O parameters................................................. 61

7.1

GPIO DC electrical specifications, 3.3V Range

(2.97V - 3.63V)..............................................61

7.2

GPIO DC electrical specifications, 5.0V (4.5V -

5.5V)............................................................. 64

7.3

5.0V (4.5V - 5.5V) GPIO Output AC

Specification..................................................68

7.4

3.3V (2.97V - 3.63V) GPIO Output AC

Specification..................................................70

Glitch Filter....................................................... 72

Flash memory specification..............................72

9.1

Flash memory program and erase

specifications................................................ 73

9.2

Flash memory Array Integrity and Margin Read

specifications................................................ 73

9.3

Flash memory module life specifications...... 74

9.3.1

Data retention vs program/erase cycles....... 75

9.4

Flash memory AC timing specifications........ 75

9.5

Flash memory read timing parameters......... 76

Analog modules................................................77

10.1

SAR_ADC..................................................... 77

10.2

Supply Diagnosis.......................................... 79

10.3

Low Power Comparator (LPCMP)................ 80

10.4

Temperature Sensor..................................... 83

Clocking modules............................................. 84

11.1

FIRC..............................................................84

11.2

SIRC............................................................. 84

11.3

PLL................................................................85

11.4

FXOSC..........................................................86

11.5

SXOSC......................................................... 88

Communication interfaces................................89

12.1

LPSPI............................................................89

12.2

LPSPI0 20 MHz and 15 MHz Combinations. 94

12.3

LPSPI2 and LPSPI5 20MHz combination for

S32K388....................................................... 94

12.4

Communication between two S32K388

devices..........................................................95

12.4.1

Timing specification for S32K388 to S32K388

communication..............................................96

12.5

I2C.................................................................97

12.6

FlexCAN characteristics................................97

12.7

SAI electrical specifications.......................... 97

12.7.1

SAI Electrical Characteristics, Slave Mode...97

12.7.2

SAI Electrical Characteristics, Master Mode.98

12.8

Ethernet characteristics.............................. 100

12.8.1

Ethernet MII (10/100 Mbps)........................ 100

12.8.2

Ethernet MII (200 Mbps)............................. 102

12.8.3

Ethernet RMII (10/100 Mbps)......................104

12.8.4

Ethernet RGMII........................................... 106

12.8.5

MDIO timing specifications......................... 107

12.9

QuadSPI..................................................... 108

12.9.1

QuadSPI Quad 3.3V SDR 120MHz............ 108

12.9.2

QuadSPI Octal 3.3V DDR 100MHz............ 110

12.9.3

QuadSPI Quad 3.3V SDR 103.33MHz....... 111

12.9.4

QuadSPI Octal 3.3V DDR 120MHz............ 112

12.9.5

QuadSPI Quad 3.3V SDR 125MHz............ 113

12.10

uSDHC........................................................114

12.10.1

uSDHC SDR electrical specifications......... 114

12.10.2

uSDHC DDR electrical specifications......... 116

12.11

LPUART specifications............................... 117

Debug modules.............................................. 117

13.1

Debug trace timing specifications............... 117

13.2

SWD electrical specifications......................118

13.3

JTAG electrical specifications..................... 119

Thermal Attributes.......................................... 121

14.1

Description.................................................. 121

14.2

Thermal characteristics...............................122

Dimensions.....................................................124

15.1

Obtaining package dimensions...................124

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