Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

S32K311NHT0MPAST Datasheet(PDF) 85 Page - NXP Semiconductors

Part # S32K311NHT0MPAST
Description  Automotive General Purpose MCUs
PDF  143 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

S32K311NHT0MPAST Datasheet(HTML) 85 Page - NXP Semiconductors

Back Button S32K311NHT0MPAST Datasheet HTML 81Page - NXP Semiconductors S32K311NHT0MPAST Datasheet HTML 82Page - NXP Semiconductors S32K311NHT0MPAST Datasheet HTML 83Page - NXP Semiconductors S32K311NHT0MPAST Datasheet HTML 84Page - NXP Semiconductors S32K311NHT0MPAST Datasheet HTML 85Page - NXP Semiconductors S32K311NHT0MPAST Datasheet HTML 86Page - NXP Semiconductors S32K311NHT0MPAST Datasheet HTML 87Page - NXP Semiconductors S32K311NHT0MPAST Datasheet HTML 88Page - NXP Semiconductors S32K311NHT0MPAST Datasheet HTML 89Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 85 / 143 page
background image
1. Startup time is for information only.
11.3 PLL
FPLL_DS, FPLL_FM and all fractional mode jitter specifications are not applicable to Auxiliary PLL on S32K328, S32K338,
S32K348, S32K358 and S32K388 devices.
Jitter values specified in this table are applicable for FXOSC reference clock input only.
Table 41. PLL
Symbol
Description
Min
Typ
Max
Unit
Condition
Spec
Number
FPLL_in
PLL input frequency 8
—
40
MHz
This is the frequency
after the Reference
Divider within the PLL
—
FPLL_out
PLL output
frequency(PLL_PHIn
_CLK)
25
—
320
MHz
—
—
FPLL_vcoRange
VCO Frequency
range
640
—
1280
MHz
—
—
FPLL_DS
Modulation Depth
(down spread)
-0.5
—
-3
%
—
—
FPLL_FM
Modulation
frequency
—
—
32
KHz
—
—
TPLL_start
PLL lock time
—
—
1
ms
—
—
JPLL_cyc
PLL period jitter (pk-
pk) 1,2,3
—
—
237
ps
FPLL_out = 240MHz,
Integer Mode
—
JPLL_cyc
PLL period jitter (pk-
pk) 1,2,3
—
—
487
ps
FPLL_out = 240MHz,
Fractional Mode
—
JPLL_acc
PLL accumulated
jitter (pk-pk) 1,2,3
—
—
840
ps
FPLL_out = 240MHz,
Integer Mode
—
JPLL_acc
PLL accumulated
jitter (pk-pk) 1,2,3
—
—
1680
ps
FPLL_out = 240MHz,
Fractional Mode
—
JPLL_cyc
PLL period jitter (pk-
pk) 1,2,3
—
—
295
ps
FPLL_out = 160MHz,
Integer Mode
—
JPLL_cyc
PLL period jitter (pk-
pk) 1,2,3
—
—
670
ps
FPLL_out = 160MHz,
Fractional Mode
—
JPLL_acc
PLL accumulated
jitter (pk-pk) 1,2,3
—
—
840
ps
FPLL_out = 160MHz,
Integer Mode
—
JPLL_acc
PLL accumulated
jitter (pk-pk) 1,2,3
—
—
1680
ps
FPLL_out = 160MHz,
Fractional Mode
—
JPLL_cyc
PLL period jitter (pk-
pk) 1,2,3
—
—
353
ps
FPLL_out = 120MHz,
Integer Mode
—
JPLL_cyc
PLL period jitter (pk-
pk) 1,2,3
—
—
853
ps
FPLL_out = 120MHz,
Fractional Mode
—
Table continues on the next page...
NXP Semiconductors
Clocking modules
S32K3xx Data Sheet, Rev. 9.1, 03/2024
Data Sheet: Technical Data
Preliminary Information for S32K388
85 / 143



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com