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S32K311NHT0MPAST Datasheet(PDF) 93 Page - NXP Semiconductors |
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S32K311NHT0MPAST Datasheet(HTML) 93 Page - NXP Semiconductors |
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93 / 143 page  SLAVE MSB SLAVE LSB OUT BIT 6 ... 1 MSB IN SS (INPUT) SPSCK (CPOL = 0) (INPUT) SPSCK (CPOL = 1) (INPUT) MOSI (INPUT) MISO (OUTPUT) LSB IN BIT 6 ... 1 3 5 5 7 10 8 11 6 12 13 12 13 4 2 9 11 Figure 43. LPSPI Slave Mode Timing (CPHA=0) MSB OUT2 LSB OUT BIT 6 ... 1 MSB IN2 SS1 (OUTPUT) SPSCK (CPOL = 0) (OUTPUT) SPSCK (CPOL = 1) (OUTPUT) MISO (INPUT) MOSI (OUTPUT) LSB IN BIT 6 ... 1 3 5 5 7 10 11 6 4 2 Figure 44. LPSPI Master Mode Timing (CPHA=0) PORT DATA PORT DATA MASTER MSB OUT MASTER LSB OUT BIT 6 ... 1 MSB IN2 SS1 (OUTPUT) SPSCK (CPOL = 0) (OUTPUT) SPSCK (CPOL = 1) (OUTPUT) MISO (INPUT) MOSI (OUTPUT) LSB IN BIT 6 ... 1 3 5 5 7 10 11 6 4 2 Figure 45. LPSPI Master Mode Timing (CPHA=1) NXP Semiconductors Communication interfaces S32K3xx Data Sheet, Rev. 9.1, 03/2024 Data Sheet: Technical Data Preliminary Information for S32K388 93 / 143 |
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