S32K311NHT0MPAST datasheet(29/143 Pages) NXP

29 / 143 page

Table 9. HSE firmware memory verification time examples (continued)

Symbol

Description

Min

Typ

Max

Unit

Condition

Spec

Number

application firmware,

using RSA 2048

cipher.

B). CORE_CLK = 120

MHz; HSE_CLK = 120

MHz.

tRSA_1024KB

Memory verification

of 1024 KB of

application firmware,

using RSA 2048

cipher.

—

23.8

—

Device running from

PLL (clocking option

B). CORE_CLK = 120

MHz; HSE_CLK = 120

MHz.

—

tECDSA_64KB

Memory verification

of 64 KB of

application firmware,

using ECDSA 521

bits cipher.

—

TBC

—

Device running from

PLL (clocking option

B). CORE_CLK = 120

MHz; HSE_CLK = 120

MHz.

—

tECDSA_1024KB

Memory verification

of 1024 KB of

application firmware,

using ECDSA 521

bits cipher.

—

TBC

—

Device running from

PLL (clocking option

B). CORE_CLK = 120

MHz; HSE_CLK = 120

MHz.

—

tSHA2_256_64KB

Memory verification

of 64 KB of

application firmware,

using SHA2 256 bits

bits cipher.

—

0.64

—

Device running from

PLL (clocking option

B). CORE_CLK = 120

MHz; HSE_CLK = 120

MHz.

—

tSHA2_256_

1024KB

Memory verification

of 1024 KB of

application firmware,

using SHA2 256 bits

bits cipher.

—

9.07

—

Device running from

PLL (clocking option

B). CORE_CLK = 120

MHz; HSE_CLK = 120

MHz.

—

6.2 Supply Monitoring

Certain monitors are present on certain devices. See Power Management chapter in reference manual.

Table 10. Supply Monitoring

Symbol

Description

Min

Typ

Max

Unit

Condition

Spec

Number

LVD_V15

Low Voltage Detect

(LVD) on V15,

deassert threshold

(in FPM)

1.34

1.38

1.42

—

HVD_V15

High Voltage Detect

(HVD) on V15,

assert threshold (in

FPM) 1

—

2.5

—

Table continues on the next page...

NXP Semiconductors

Power management

S32K3xx Data Sheet, Rev. 9.1, 03/2024

Data Sheet: Technical Data

Preliminary Information for S32K388

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