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S32K311NHT0MPAST Datasheet(PDF) 21 Page - NXP Semiconductors |
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S32K311NHT0MPAST Datasheet(HTML) 21 Page - NXP Semiconductors |
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21 / 143 page ![]() Table 3. Voltage and current operating requirements (continued) Symbol Description Min Typ Max Unit Condition Spec Number VGPIO Input voltage range at any I/O or analog pin 1,7 -0.3 — VDD_HV _A/B + 0.3 V — — VODPU Open-drain pull-up voltage 1,8 — — VDD_HV _A/B V — — IINJPAD_DC_OP Continuous DC input current (positive/ negative) that can be injected into an I/O pin 9 -3 — 3 mA VDD_HV_A >= 3.6V — IINJPAD_DC_OP Continuous DC input current (positive/ negative) that can be injected into an I/O pin 9 -2 — 3 mA VDD_HV_A >= 2.97V — IINJSUM_DC_OP Sum of absolute value of injected currents on all the I/O pins (continuous DC limit) 9,10 -30 — 30 mA VDD_HV_A >= 3.6V — IINJSUM_DC_OP Sum of absolute value of injected currents on all the I/O pins (continuous DC limit) 9,10 -20 — 30 mA VDD_HV_A >= 2.97V — Vramp_slow Supply ramp rate (slow) 1,11 0.5 — — V/min — — Vramp_fast Supply ramp rate (fast) 1,11 — — 100 V/ms — — 1. All voltages are referred to VSS unless otherwise specified. 2. Voltage at VDD_DCDC cannot be higher than VDD_HV_A. 3. Min and Max values are applicable only for non-SMPS mode where V15 is sourced externally. 4. If total power dissipation and maximum junction temperature allows. Please refer to Thermal operating characteristics table for the maximum junction temperature, and Thermal characteristics table for the thermal characteristics, to determine the maximum power dissipation allowed for a given package. 5. You must ensure that the junction temperature in the application must not exceed the maximum specified Tj. 6. VREFH should always be equal to or less than VDD_HV_A +0.1. Any positive differential voltage between VREFH and VDD_HV_A i.e., VDD_HV_A < VREFH <= VDD_HV_A + 0.1V) is for RF-AC only. Appropriate decoupling capacitors should be used to filter noise on the supplies. See application note AN5032 for reference supply design for SAR ADC 7. Keeping the input voltage between this range practically ensures that no (noticeable) current is being injected. When exceeding these limits, the current being injected must be lower than IINJPAD_DC_OP, all the time. 8. Open-drain outputs must be pulled respectively to their supply rail (VDD_HV_A or VDD_HV_B). 9. When the input pad voltage levels are close to VDD_HV_A (respectively to VDD_HV_B) or VSS, plus /minus the forward voltage of ESD diodes, practically, no current is being injected. When these limits are exceeded, the maximum input current spec must be honored. Refer to the S32K3 Hardware Design Guidelines AN for more details and recommendations for protecting the devices against injection current. NXP Semiconductors General S32K3xx Data Sheet, Rev. 9.1, 03/2024 Data Sheet: Technical Data Preliminary Information for S32K388 21 / 143 |
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