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JS48F4400P0P3C0 Datasheet(PDF) 70 Page - Numonyx B.V

Part # JS48F4400P0P3C0
Description  StrataFlash짰 Cellular Memory
PDF  139 Pages
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Manufacturer  NUMONYX [Numonyx B.V]
Direct Link  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

JS48F4400P0P3C0 Datasheet(HTML) 70 Page - Numonyx B.V

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Numonyx™ StrataFlash® Cellular Memory (M18)
Datasheet
April 2008
70
309823-10
Note:
DPD pin is low-true (ECR14 = 0)
Note:
DPD pin is low-true (ECR14 = 0)
S2
tEHSH (tEHSL)
CE# high to DPD asserted
0
—
µs
1,2
S3
tSHEL (tSLEL)
DPD deasserted to CE# low
75
—
1,2
S4
tPHEL
RST# high during DPD state to CE# low (DPD
deasserted to CE# low)
75
—
1,2
Notes:
1.
These specifications are valid for all device versions (packages and speeds).
2.
Sampled, but not 100% tested.
3.
DPD must remain asserted for the duration of Deep Power Down mode. DPD current levels are achieved 40 µs after
entering the DPD mode.
Figure 41: Deep Power Down Operation Timing
Table 26: Deep Power Down Specifications (Sheet 2 of 2)
Nbr.
Symbol
Parameter
Min
Max
Unit
Notes
S3
S1
S2
DPD [S]
CE# [E]
RST# [P]
Figure 42: Reset During Deep Power Down Operation Timing
S4
S2
RST# [P]
DPD [S]
CE# [E]



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