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JS48F4400P0P3C0 Datasheet(PDF) 98 Page - Numonyx B.V |
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JS48F4400P0P3C0 Datasheet(HTML) 98 Page - Numonyx B.V |
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98 / 139 page ![]() Numonyx™ StrataFlash® Cellular Memory (M18) Datasheet April 2008 98 309823-10 Each register contains OTP bits that can only be programmed from “one” to “zero” - register bits cannot be erased from “zero” back to “one”. This feature makes the OTP registers particularly useful for implementing system-level security schemes, for permanently storing data, or for storing fixed system parameters. OTP Lock Register bits “lock out” subsequent programming of the corresponding OTP register. Each OTP Register can be locked by programming its corresponding lock bit to zero. As long as an OTP register remains unlocked (that is, its lock bit = 1), any of its remaining “one” bits can be programmed to “zero”. Caution: Once an OTP Register is locked, it cannot be unlocked. Attempts to program a locked OTP Register will fail with error bits set. To program any OTP bits, first issue the Program OTP Register setup command at any device address. Next, write the desired OTP Register data at the desired OTP Register address. OTP Register and OTP Lock Register programming is performed 16 bits at a time; only “zeros” within the data word affect any change to the OTP register bits. Figure 50: 2-Kbit OTP Registers 0x89 OTP Lock Register 1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0x102 0x109 0x8A 0x91 128-bit OTP Register 16 (User-Programmable) 128-bit OTP Register 1 (User-Programmable) 0x88 0x85 64-bit Segment (User-Programmable) 0x84 0x81 0x80 OTP Lock Register 0 64-bit Segment (Factory-Programmed) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 128-Bit OTP Register 0 |
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