RA4C1 datasheet(30/97 Pages) RENESAS

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0.5

1.5

2.5

3.5

4.5

Frequency [MHz]

Normal mode (peripheral clocks enabled, cache disabled)

Sleep mode (peripheral clocks enabled, cache disabled)

Note. Average value of the testedmiddle samplesduringproduct evaluation(typical condition).

Figure 2.4

Frequency dependency in Middle-speed mode (reference data)

2.2.6

VCC Rise and Fall Gradient and Ripple Frequency

Table 2.17

Rise and fall gradient characteristics

Conditions: VCC = AVCC0 = 0 to 3.6 V

Parameter

Symbol

Min

Typ

Max

Unit

Test conditions

Power-on VCC

rising gradient

Voltage monitor 0 reset disabled at startup

SrVCC

0.02

—

ms/V

—

Voltage monitor 0 reset enabled at startup*1 *2

—

SCI/SWD boot mode*2

Note 1. When OFS1.LVDAS = 0.

Note 2. At boot mode, the reset from voltage monitor 0 is disabled regardless of the value of OFS1.LVDAS bit.

Table 2.18

Rising and falling gradient and ripple frequency characteristics

Conditions: VCC = AVCC0 = 1.6 to 3.6 V

The ripple voltage must meet the allowable ripple frequency fr(VCC) within the range between the VCC upper limit (3.6 V) and lower limit (1.6

V).

When the VCC change exceeds VCC ± 10%, the allowable voltage change rising and falling gradient dt/dVCC must be met.

Parameter

Symbol

Min

Typ

Max

Unit

Test conditions

Allowable ripple frequency

fr(VCC)

—

kHz

Figure 2.5

Vr (VCC) ≤ VCC × 0.2

—

MHz

Figure 2.5

Vr (VCC) ≤ VCC × 0.08

—

MHz

Figure 2.5

Vr (VCC) ≤ VCC × 0.06

Allowable voltage change rising and

falling gradient

dt/dVCC

1.0

—

ms/V

When VCC change exceeds VCC ± 10%

RA4C1 Datasheet

2. Electrical Characteristics

R01DS0457EJ0110 Rev.1.10

Jul 4, 2025

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