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RA4C1 Datasheet(PDF) 1 Page - Renesas Technology Corp |
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RA4C1 Datasheet(HTML) 1 Page - Renesas Technology Corp |
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1 / 97 page ![]() RA4C1 Group Renesas Microcontrollers The RA4C1 group are low power, 32-bit microcontrollers (MCUs) based on the Arm® Cortex®-M33 (CM33) core with TrustZone®, delivering an ideal balance of low voltage operation, low power consumption and high performance combined with an advanced security engine needed by many security sensitive applications. The RA4C1 offers up to 512 KB of code flash memory, 8 KB of data flash memory and 96 KB of SRAM. The RA4C1 offers a wide range of peripheral features including 2 × I2C, CANFD, 3 × SPI, Quad SPI, a segment LCD controller and an RTC with independent power supply, and comes in 64 and 100 pin LQFP packages. Features R01DS0457EJ0110 Rev.1.10 Jul 4, 2025 ■ Arm® Cortex®-M33 Core ● Armv8-M architecture with the main extension ● Maximum operating frequency: 80 MHz ● Arm Memory Protection Unit (Arm MPU) – Protected Memory System Architecture (PMSAv8) – Secure MPU (MPU_S): 8 regions – Non-secure MPU (MPU_NS): 8 regions ● SysTick timer – Embeds two Systick timers: Secure and Non-secure instance – Driven by LOCO or system clock ● CoreSight™ ETM-M33 ■ Memory ● Up to 512 KB code flash memory ● 8 KB data flash memory (100,000 program/erase (P/E) cycles) ● 96 KB SRAM ■ Connectivity ● Serial Communications Interface (SCI) × 6 – Asynchronous interfaces – 8-bit clock synchronous interface – Smart card interface – Simple IIC – Simple SPI – Simple LIN (SCI1) – Manchester coding (SCI3, SCI4) ● IrDA interface (IrDA) ● I2C bus interface (IIC) × 2 ● Serial Interface UARTA (UARTA) × 2 ● Serial Peripheral Interface (SPI) × 3 ● Quad Serial Peripheral Interface (QSPI) ● CAN with Flexible Data-rate (CANFD) ■ Analog ● 12-bit A/D Converter (ADC12) ● Temperature Sensor (TSN) ■ Timers ● General PWM Timer 32-bit (GPT32) × 2 ● General PWM Timer 16-bit (GPT16) × 4 ● Low Power Asynchronous General Purpose Timer (AGT) × 2 ■ Security and Encryption ● Renesas Secure IP (RSIP-E31A) – Symmetric algorithms: AES – Asymmetric algorithms: ECC – Hash-value generation: SHA224, SHA256 – 128-bit unique ID ● Arm® TrustZone® – Up to three or six regions for the code flash, depending on the bank mode – Up to two regions for the data flash – Up to three regions for the SRAM – Individual secure or non-secure security attribution for each peripheral ● Device lifecyle management ● Pin function – Up to three tamper pins – Secure pin multiplexing ■ System and Power Management ● Low power modes ● Independent power supply Realtime Clock (RTC) ● Independent power supply (VRTC) domain power-on reset (VRTC_POR) circuit ● Event Link Controller (ELC) ● Data Transfer Controller (DTC) ● DMA Controller (DMAC) × 8 ● Power-on reset ● Low Voltage Detection (LVD) with voltage settings ● Low Voltage Detection for EXLVDVBAT pin ● Low Voltage Detection for VRTC pin ● Low Voltage Detection for EXLVD pin ● Watchdog Timer (WDT) ● Independent Watchdog Timer (IWDT) ■ Human Machine Interface (HMI) ● Segment LCD Controller (SLCDC) ■ Multiple Clock Sources ● Main clock oscillator (MOSC) (1 to 20 MHz) ● Sub-clock oscillator (SOSC) (32.768 kHz) ● High-speed on-chip oscillator (HOCO) (48/64/80 MHz) ● Middle-speed on-chip oscillator (MOCO) (8 MHz) ● Low-speed on-chip oscillator (LOCO) (32.768 kHz) ● IWDT-dedicated on-chip oscillator (15 kHz) ● Clock trim function for HOCO/MOCO/LOCO ● PLL ● PLL_RTC ● Clock out support ■ General-Purpose I/O Ports ● 5-V tolerance, open drain, input pull-up ■ Operating Voltage ● VCC: 1.6 to 3.6 V ■ Operating Temperature and Packages ● Ta = -40 ℃ to +105 ℃ – 100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch) – 64-pin LQFP (10 mm × 10 mm, 0.5 mm pitch) Datasheet R01DS0457EJ0110 Rev.1.10 Jul 4, 2025 Page 1 of 97 |
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