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RA4C1 Datasheet(PDF) 44 Page - Renesas Technology Corp |
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RA4C1 Datasheet(HTML) 44 Page - Renesas Technology Corp |
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44 / 97 page  Input capture tGTICW Figure 2.21 GPT input capture timing tACYC2 AGTIO, AGTEE (input) tACYC tACKWL tACKWH AGTIO, AGTO, AGTOA, AGTOB (output) Figure 2.22 AGT I/O timing ADTRG0 tTRGW Figure 2.23 ADC12 trigger input timing 2.3.7 CAC Timing Table 2.36 CAC timing Parameter Symbol Min Typ Max Unit Test conditions CACREF input pulse width tPBcyc ≤ tCAC*1 tCACREF 4.5 × tCAC + 3 × tPBcyc — — ns — tPBcyc > tCAC*1 5 × tCAC + 6.5 × tPBcyc — — ns Note: tPBcyc: PCLKB cycle. Note 1. tCAC: CAC count clock source cycle. RA4C1 Datasheet 2. Electrical Characteristics R01DS0457EJ0110 Rev.1.10 Jul 4, 2025 Page 44 of 97 |
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