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7643 Datasheet(PDF) 173 Page - Renesas Technology Corp |
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7643 Datasheet(HTML) 173 Page - Renesas Technology Corp |
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173 / 424 page ![]() Rev.2.00 Aug 28, 2006 page 52 of 202 7643 Group REJ09B0133-0200 APPLICATION 2.4 UART Fig. 2.4.17 Registers setting for receiver (2) USTS b0 b7 UTRB1 UTRB2 b0 b7 b0 b7 UART transmit/receive buffer register 2 (Address : 3416) high-order 1 bit of receiving data read low-order 8 bits of receiving data read UART status register (Address : 3216) Read data from high-order address first, then from low-order address. UART transmit/receive buffer register 1 (Address : 3316) Receive buffer full flag Parity error flag Framing error flag Overrun error flag Summing error flag |
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