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7643 Datasheet(PDF) 176 Page - Renesas Technology Corp

Part # 7643
Description  8-BIT SINGLE-CHIP MICROCOMPUTER
PDF  424 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7643 Datasheet(HTML) 176 Page - Renesas Technology Corp

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Rev.2.00
Aug 28, 2006
page 55 of 202
7643 Group
REJ09B0133-0200
APPLICATION
2.4 UART
(2) UART address mode
qOperation explanation
The UART address mode is intended for use to communicate between the specified MCUs in
a multi-MCU environment. The UART address mode can be used in either an 8-bit or 9-bit
character length. An address is identified by the MSB of the incoming data being “1”. The bit
is “0” for non-address data.
When the MSB of the incoming data is “0” in the UART address mode, the Receive Buffer Full
Flag is set to “1”, but the Receive Buffer Full Interrupt Request Bit is not set to “1”. When the
MSB of the incoming data is “1”, normal receive operation is performed. In the UART address
mode an overrun error is not detected for reception of the 2nd and onward bytes. An occurrence
of framing error or parity error sets the Summing Error Interrupt Request Bit to “1” and the data
is not received independent of its MSB contents.
Usage of UART address mode is explained as follows:
(1) Set the UART Address Mode Enable Bit to “1”.
(2) Sends the address data of a slave MCU first from a host MCU to all slave MCUs. The MSB
of address data must be “1” and the remaining 7 bits specify the address.
(3) The all slave MCUs automatically check for the received data whether its stop bit is valid
or not, and whether the parity error occurs or not (when the parity enabled). If these errors
occur, the Framing Error Flag or Parity Error Flag and the Summing Error Flag are set to
“1”. Then, the Summing Error Interrupt Request Bit is also set to “1”.
(4) When received data has no error, the all slave MCUs must judge whether the address of
the received address data matches with their own addresses by a program. After the MSB
being “1” is received, the UART Address Mode Enable Bit is automatically set to “0” (disabled).
(5) The UART Address Mode Enable Bit of the slave MCUs which have be judged that the
address does not match with them must be set to “1” (enabled) again by a program to
disable reception of the following data.
(6) Transmit the data of which MSB is “0” from the host MCU. The slave MCUs disabling the
UART address mode receive the data, and their Receive Buffer Full Flags and the Receive
Buffer Full Interrupt Request Bits are set to “1”. For the other slave MCUs enabling the
UART address mode, their Receive Buffer Full Flag are set to “1”, but their Receive Buffer
Full Interrupt Request Bits are not set to “1”.
(7) An overrun error cannot be detected after the first data has been received in UART Address
Mode. Accordingly, even if the slave MCUs does not read the received data and the next
data has been received, an overrun error does not occur.
Thus, a communication between a host MCU and the specified MCU can be realized.



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