7643 datasheet(175/424 Pages) RENESAS

175 / 424 page

Rev.2.00

Aug 28, 2006

page 54 of 202

7643 Group

REJ09B0133-0200

APPLICATION

2.4 UART

Fig. 2.4.19 Control procedure of receiver

• Judgment of completion of receiving

(Receive buffer full flag)

USTS (Address : 3216), bit2?

Read out a received data from UTRB2

(Add. : 3516), UTRB1 (Add. : 3416)

USTS (Address : 3216), bit6?

USTS (Address : 3216), bit2?

• Judgment of an error flag

USTS (Address : 3216), bit6?

UCON (Address : 3316)

010x10002

010x10102

Processing for error

• Reception of the first byte data

Receive buffer full flag is set

to “0” by reading data.

• Judgment of completion of

receiving

(Receive buffer full flag)

• Reception of the second byte data

Receive buffer full flag is set

to “0” by reading data.

• Judgment of an error flag

• Countermeasure for a bit slippage

RESET

(Address : 3116)

(Address : 3316)

(Address : 3016)

(Address : 3616)

Initialization

UBRG

UCON

UMOD

URTSC

4D16

010x1x102

010x10002

000000002

q x: This bit is not used here. Set it to “0” or “1” arbitrarily.

ICONA

ICONB

CLI

(Address : 0516)

(Address : 0616)

x0xxxxxx2

xx0000002

• RTS function enabled

•

φ as UART clock, 2 stop bits,

Parity checking disabled, 8-bit character length

• No delay of RTS

• UART receive buffer full interrupt disabled

• UART summing error interrupt disabled

UCON (Address : 3316), bit1

• Reception starts.

Read out a received data from UTRB2

(Add. : 3516), UTRB1 (Add. : 3416)

UCON (Address : 3316), bit1

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