7643 datasheet(174/424 Pages) RENESAS

174 / 424 page

Rev.2.00

Aug 28, 2006

page 53 of 202

7643 Group

REJ09B0133-0200

APPLICATION

2.4 UART

Figure 2.4.18 shows a control procedure of transmitter, and Figure 2.4.19 shows a control procedure

of receiver.

Fig. 2.4.18 Control procedure of transmitter

10 ms pass ?

The second byte of

a transmission data

USTS (Address : 3216), bit0?

UTRB2 (Add. : 3516)

UTRB1 (Add. : 3416)

The first byte of a

transmission data

• An interval of 10 ms generated by Timer

• Transmission data write

Transmit buffer empty flag is set to “0” by this writing.

Transmission starts owing to “L” input to CTS pin.

• Judgment of transferring data from Transmit

buffer register to Transmit shift register

(Transmit buffer empty flag)

• Judgment of transferring data from Transmit

buffer register to Transmit shift register

(Transmit buffer empty flag)

• Judgment of shift completion of Transmit shift register

(Transmit complete flag)

USTS (Address : 3216), bit1?

UTRB2 (Add. : 3516)

UTRB1 (Add. : 3416)

• Transmission data write

Transmit buffer empty flag is set to “0” by this writing.

USTS (Address : 3216), bit1?

RESET

(Address : 3116)

(Address : 3316),

bit7 to bit 1

(Address : 3316), bit0

(Address : 3016)

Initialization

UBRG

UCON

UMOD

4D16

q x: This bit is not used here. Set it to “0” or “1” arbitrarily.

ICONA

CLI

(Address : 0516), bit7

•

φ as UART clock, 2 stop bits,

• UART transmit interrupt disabled

• CTS function enabled

Parity checking disabled, 8-bit character length

010x10002

001xx102

7643 Datasheet(PDF) 174 Page - Renesas Technology Corp

7643 Datasheet(HTML) 174 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL