7643 datasheet(186/424 Pages) RENESAS

186 / 424 page

Rev.2.00

Aug 28, 2006

page 65 of 202

7643 Group

REJ09B0133-0200

APPLICATION

2.4 UART

Fig. 2.4.29 Control procedure (2)

USBIS1 (Address : 5216), bit3

DMA0M2 (Address : 4116)

UCON (Address : 3316) ,bit2

UCON (Address : 3316) ,bit0

110000102

• Start processing

DMA0 enabled

UART transmit initializing

UART transmit enabled

* Interrupt request flag is set as soon as

UART transmit interrupt is enabled.

However, in this time, since interrupt request flag is

only for reference, so that the interrupt processing is

not performed actually.

USB endpoint 1OUT interrupt

RTI

Interrupt occurs

000000102

000000012

000100012

* When USBINDEX is set, the stored value is

pushed to the temporary buffer, and after the

interrupt processing is finished, pop the pushed

values to USBINDEX.

• End processing

DMA0 disabled

USB receive (OUT) : enabled

DMA0 interrupt

RTI

Interrupt occurs

q x: This bit is not used here. Set it to “0” or “1” arbitrarily.

Pop registers

Push registers to stack

Pop registers

Push registers to stack

DMA0M2 (Address : 4116)

USBINDEX (Address : 5816)

OUT_CSR (Address : 5A16)

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