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7643 Datasheet(PDF) 183 Page - Renesas Technology Corp |
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7643 Datasheet(HTML) 183 Page - Renesas Technology Corp |
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183 / 424 page  Rev.2.00 Aug 28, 2006 page 62 of 202 7643 Group REJ09B0133-0200 APPLICATION 2.4 UART Fig. 2.4.26 Registers setting (2) φ = System clock/2, system clock = f(XIN) Clock control register (Address : 1F16) CCR 0 0 0 0 0 1 Frequency synthesizer multiply register 1 (Address : 6D16) 0016 FSM1 b0 b7 b0 b7 USBC b0 b7 FSC Frequency synthesizer: enabled Frequency synthesizer input: f(XIN) 0 b0 b7 01 FF16 FSM2 b0 b7 0016 FSD 1 10 10 0 1 000 0 0 Transmitting side Frequency synthesizer multiply register 2 (Address : 6E16) Frequency synthesizer divide register (Address : 6F16) Frequency synthesizer control register (Address : 6C16) USB control register (Address : 1316) USB line driver current : High USB line driver : enabled USB clock: enabled USB function control unit : USB block enabled |
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