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7643 Datasheet(PDF) 190 Page - Renesas Technology Corp |
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7643 Datasheet(HTML) 190 Page - Renesas Technology Corp |
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190 / 424 page  Rev.2.00 Aug 28, 2006 page 69 of 202 7643 Group REJ09B0133-0200 APPLICATION 2.4 UART Fig. 2.4.33 Registers setting (3) φ = System clock/2, system clock = f(XIN)/2 CCR 0 0 0 0 0 1 Frequency synthesizer multiply register 1 (Address : 6D16) 0016 FSM1 b0 b7 b0 b7 USB control register (Address : 1316) USBC b0 b7 Frequency synthesizer control register (Address : 6C16) FSC Frequency synthesizer: enabled Frequency synthesizer input: f(XIN) 0 b0 b7 01 Frequency synthesizer multiply register 2 (Address : 6E16) FF16 FSM2 b0 b7 0016 FSD 1 10 1 00 1 000 0 Frequency synthesizer divide register (Address : 6F16) 0 Clock control register (Address : 1F16) Transmitting side USB line driver current : High USB line driver : enabled USB clock: enabled USB function control unit : USB block enabled |
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