Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

Preview PDF HTML

7643 Datasheet(PDF) 215 Page - Renesas Technology Corp

Part # 7643
Description  8-BIT SINGLE-CHIP MICROCOMPUTER
PDF  424 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7643 Datasheet(HTML) 215 Page - Renesas Technology Corp

Back Button 7643 Datasheet HTML 211Page - Renesas Technology Corp 7643 Datasheet HTML 212Page - Renesas Technology Corp 7643 Datasheet HTML 213Page - Renesas Technology Corp 7643 Datasheet HTML 214Page - Renesas Technology Corp 7643 Datasheet HTML 215Page - Renesas Technology Corp 7643 Datasheet HTML 216Page - Renesas Technology Corp 7643 Datasheet HTML 217Page - Renesas Technology Corp 7643 Datasheet HTML 218Page - Renesas Technology Corp 7643 Datasheet HTML 219Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 215 / 424 page
background image
Rev.2.00
Aug 28, 2006
page 94 of 202
7643 Group
REJ09B0133-0200
APPLICATION
2.5 DMAC
Fig. 2.5.18 Control procedure
CCR (address 1F16)
FSM1 (address 6D16)
FSM2 (address 6E16)
FSD (address 6F16)
FSC (address 6C16)
USBC (address 1316)
USBINDEX (address 5816)
USBFIFOMR (address 5F16)
IN_MAXP (address 5B16)
IN_CSR (address 5916)
DMAIS (address 3F16)
DMA0SL (address4216)
DMA0SH (address 4316)
DMA0DL (address4416)
DMA0DH (address 4516)
DMA0CL (address4616)
DMA0CH (address 4716)
DMA0M1 (address 4016)
USBIE1 (address 5416)
IREQA (address 0216)
ICONA (address 0516)
DMA0M2 (address 4116)
CLI
0016
0016
FF16
0016
4116
101100X02
000000102
000010002
8016
1XXXXXXX2
0XXXXX002
XX16
XX16
6216
0016
7F16
0016
100X0X0X2
0000XXXX2
0016
XXX1XXX02
110101102
Y
RESET
•USB initialization
DMAC channel 0 interrupt
Data is available in external FIFO ?
RTI
N
Initialization
q x: This bit is not used here. Set it to “0” or “1” arbitrarily.
CLT (Note 1)
CLD (Note 2)
Push registers to stack
Note1: When using Index X mode flag (T)
2: When using Decimal mode flag (D)
•Push registers used in interrupt process routine
SEI
DMA0M2 (address 4116), bit 7
0
Pop registers
•Maximum packet size of 128 bytes
•External FIFO for source register
•USB FIFO1 for destination register
•USB endpoint 2 IN_PKT_RDY as hardware transfer request source
•USB endpoint 2 IN and OUT interrupts disabled
•DMAC channel 0 USB and master CPU bus interface disabled
•After confirming external FIFO state, generate the software transfer
trigger request
•If a data is deficient, stop the DMA transferring. After all data have
been available, resume the transfer.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com