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7643 Datasheet(PDF) 248 Page - Renesas Technology Corp |
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7643 Datasheet(HTML) 248 Page - Renesas Technology Corp |
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248 / 424 page ![]() Rev.2.00 Aug 28, 2006 page 127 of 202 7643 Group REJ09B0133-0200 APPLICATION 2.6 USB 2.6.6 USB interrupts (1) USB function interrupt The USB function interrupts is used for data flow control as well as USB power management. In order to use a USB function interrupt, set the Interrupt disable flag (I) to “0” and USB function interrupt enable bit of interrupt control register A (address 000516, bit 0) to “1”. In addition, set all bits corresponding to USB interrupt enable register 1 (address 005416) and USB interrupt enable register 2 (address 005516). Endpoint x IN interrupt, endpoint x OUT interrupt An interrupt request occurs when the following flag is set to “1”. USB endpoint x IN/OUT interrupt status flag of USB interrupt status register 1 or 2 (addresses 005216, 005316) Endpoints 1 and 2 have two interrupt status bits (IN and OUT) each and endpoint 0 has one interrupt status bit. Each interrupt status flag is set to “1” under any of the following conditions. - USB endpoint 0 interrupt status flag (INTST0) (when using endpoint 0) Endpoint 0: one packet successfully received, or Endpoint 0: one packet successfully transmitted, or DATA_END bit is “0”, or FORCE_STALL flag is “1”, or SETUP_END flag is “1”. - USB endpoint x (x = 1, 2) IN interrupt status flag (INTST2, 4) (when using endpoints 1, 2): Endpoint x (x = 1, 2): one packet data successfully transmitted - USB endpoint x (x = 1, 2) OUT interrupt status flag (INTST3, 5) (when using endpoints 1, 2): Endpoint x (x = 1, 2): one packet data successfully received, or FORCE_STALL flag is “1”. q Reset interrupt An interrupt request occurs when the USB reset interrupt status flag of USB interrupt status register 2 (005316) is “1”. The USB reset interrupt status flag is set to “1” when the USB FCU detects SE0 for a period of 2.5 ms on the D+/D- line by the USB FCU. At USB reset, all USB internal registers (addresses 005016 to 005F16) bits, excluding this bit, are initialized. Initialize each endpoint when new data transfer is received from the host CPU. q Resume signal interrupt An interrupt request occurs when the USB resume signal interrupt status flag of the USB interrupt status register 2 (address 005316) is “1”. The USB resume signal interrupt status flag is set to “1” if a non-idle signal is detected on the D+/D- line when the USB FCU is in the suspend mode. Also, the USB resume signal interrupt status flag is set to “1” even when the MCU returns from the suspend mode by a remote wake- up (INT interrupt, etc.) and the USB remote wake-up bit is set to “1”. q Suspend signal interrupt An interrupt request occurs when the USB suspend signal interrupt status flag of the USB interrupt status register 2 (address 005316) is “1”. This flag is set to “1” if no activity is detected on the D+/D- line for a period of 3ms. The MCU returns from the suspend state with a USB resume interrupt or remote wake-up. |
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