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7643 Datasheet(PDF) 307 Page - Renesas Technology Corp |
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7643 Datasheet(HTML) 307 Page - Renesas Technology Corp |
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307 / 424 page ![]() Rev.2.00 Aug 28, 2006 page 186 of 202 7643 Group REJ09B0133-0200 APPLICATION 2.8 External device connection 2.8.8 Notes on external devices connection (1) Rewrite port P3 latch In both memory expansion mode and microprocessor mode, ports P31 and P32 can be used as output ports. We recommend to use the LDM instruction or STA instruction to write to port P3 register (address 000E16). If using the Read-Modify-Write instruction (SEB instruction, CLB instruction) you will need to map a memory that the CPU can read from and write to. [Reason] The access to address 000E16 is performed: •Read from external memory •Write to both port P3 latch and external memory. It is because address 000E16 is assigned on an external area In the memory expansion mode and microprocessor mode. Accordingly, if a Read-Modify-Write instruction is executed to address 000E16, the external memory contents is read out and after its modification it will be written into both port P3 latch and an external memory. As a result, if an external memory is not allocated in address 000E16 then, the MCU will read an undefined value and write its modified value into the port P3 latch. Therefore port P3 latch value will become undefined. (2) overlap of internal and external memories In the memory expansion mode, if the internal and external memory areas overlap, the internal memory becomes the valid memory for the overlapping area. When the CPU performs a read or a write operation on this overlapped area, the following things happen: •Read The CPU reads out the data in the internal memory instead of in the external memory. Note that, since the CPU will output a proper read signal, address signal, etc., the memory data at the respective address will appear on the external data bus. •Write The CPU writes data to both the internal and external memories. _____ ______ (3) RD, WR pins In the memory expansion mode or microprocessor mode, a read-out control signal is output from ______ ______ the RD pin (P36), and a write-in control signal is output from the WR pin (P37). “L” level is output ______ ______ from the RD pin at CPU read-out and from the WR pin at CPU write-in. These signals function for internal access and external access. |
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