7643 datasheet(316/424 Pages) RENESAS

316 / 424 page

Rev.2.00

Aug 28, 2006

page 195 of 202

7643 Group

REJ09B0133-0200

APPLICATION

2.10 Clock generating circuit

2.10.5 Clock generating circuit application examples

(1) Status transition during power failure

Outline: The clock is counted up every one second by using the timer interrupt during a power

failure.

Fig. 2.10.9 Status transition diagram during power failure

Fig. 2.10.8 Connection diagram

Specifications: •Reducing power dissipation as low as possible while maintaining clock function

•Clock: f(XIN) = 4.19 MHz, f(XCIN) = 32.768 kHz

•Port processing

Input port: Fixed to “H” or “L” level on the external

Output port: Fixed to output level that does not cause current flow to the

external

(Example) When a circuit turns on LED at “L” output level, fix the

output level to “H”.

I/O port: Input port

→ Fixed to “H” or “L” level on the external

Output port

→ Output of data that does not consume current

Figure 2.10.9 shows the status transition diagram during power failure and Figure 2.10.10 shows

the setting of relevant registers.

7643 Group

Input port

(Note)

Power failure detection signal

Note: A signal is detected when input to input port, interrupt

input pin, or analog input pin.

Reset released

Power failure detected

Internal system clock

XCIN

XIN

Middle-speed

mode

High-speed mode

Low-speed mode

Change internal system

clock to high-speed mode

After detection, change internal system clock to

low-speed mode and stop oscillating XIN-XOUT

XCIN-XCOUT oscillation function selected

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