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MC68HC908AP16CFB Datasheet(PDF) 111 Page - Motorola, Inc |
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MC68HC908AP16CFB Datasheet(HTML) 111 Page - Motorola, Inc |
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111 / 440 page ![]() Clock Generator Module (CGM) Functional Description MC68HC908AP Family — Rev. 2.5 Data Sheet MOTOROLA 111 5. Select the VCO’s power-of-two range multiplier E, according to this table: 6. Select a VCO linear range multiplier, L, where fNOM = 125kHz 7. Calculate and verify the adequacy of the VCO programmed center-of-range frequency, fVRS. The center-of-range frequency is the midpoint between the minimum and maximum frequencies attainable by the PLL. For proper operation, 8. Verify the choice of P, R, N, E, and L by comparing fVCLK to fVRS and fVCLKDES. For proper operation, fVCLK must be within the application’s tolerance of fVCLKDES, and fVRS must be as close as possible to fVCLK. NOTE: Exceeding the recommended maximum bus frequency or VCO frequency can crash the MCU. Frequency Range E 0 < fVCLK < 9,830,400 0 9,830,400 ≤ f VCLK < 19,660,800 1 19,660,800 ≤ f VCLK < 39,321,600 2 NOTE: Do not program E to a value of 3. L round f VCLK 2 E f NOM × -------------------------- ⎝⎠ ⎜⎟ ⎛⎞ = f VRS L2 E × ()f NOM = f VRS f VCLK – f NOM 2 E × 2 -------------------------- ≤ Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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