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MC68HC908AP16CFB Datasheet(PDF) 147 Page - Motorola, Inc |
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MC68HC908AP16CFB Datasheet(HTML) 147 Page - Motorola, Inc |
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147 / 440 page ![]() System Integration Module (SIM) Low-Power Modes MC68HC908AP Family — Rev. 2.5 Data Sheet MOTOROLA 147 Figure 9-16. Wait Recovery from Interrupt or Break Figure 9-17. Wait Recovery from Internal Reset 9.6.2 Stop Mode In stop mode, the SIM counter is reset and the system clocks are disabled. An interrupt request from a module can cause an exit from stop mode. Stacking for interrupts begins after the selected stop recovery time has elapsed. Reset or break also causes an exit from stop mode. The SIM disables the clock generator module output (CGMOUT) in stop mode, stopping the CPU and peripherals. Stop recovery time is selectable using the SSREC bit in the configuration register 1 (CONFIG1). If SSREC is set, stop recovery is reduced from the normal delay of 4096 ICLK cycles down to 32. This is ideal for applications using canned oscillators that do not require long start-up times from stop mode. NOTE: External crystal applications should use the full stop recovery time by clearing the SSREC bit. $6E0C $6E0B $00FF $00FE $00FD $00FC $A6 $A6 $01 $0B $6E $A6 IAB IDB EXITSTOPWAIT NOTE: EXITSTOPWAIT = RST pin OR CPU interrupt OR break interrupt IAB IDB RST $A6 $A6 $6E0B RSTVCTH RSTVCTL $A6 ICLK 32 CYCLES 32 CYCLES Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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