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MC68HC908AP16CFB Datasheet(PDF) 290 Page - Motorola, Inc |
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MC68HC908AP16CFB Datasheet(HTML) 290 Page - Motorola, Inc |
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290 / 440 page ![]() Serial Peripheral Interface Module (SPI) Data Sheet MC68HC908AP Family — Rev. 2.5 290 MOTOROLA 15.3 Pin Name Conventions and I/O Register Addresses The text that follows describes the SPI. The SPI I/O pin names are SS (slave select), SPSCK (SPI serial clock), CGND (clock ground), MOSI (master out slave in), and MISO (master in/slave out). The SPI shares four I/O pins with four parallel I/O ports. The full names of the SPI I/O pins are shown in Table 15-1. The generic pin names appear in the text that follows. Figure 15-1 summarizes the SPI I/O registers. = Table 15-1. Pin Name Conventions SPI Generic Pin Names: MISO MOSI SS SPSCK CGND Full SPI Pin Names: SPI PTC2/MISO PTC3/MOSI PTC4/SS PTC5/SPSCK VSS Addr. Register Name Bit 7 654321 Bit 0 $0010 SPI Control Register (SPCR) Read: SPRIE R SPMSTR CPOL CPHA SPWOM SPE SPTIE Write: Reset: 00101000 $0011 SPI Status and Control Register (SPSCR) Read: SPRF ERRIE OVRF MODF SPTE MODFEN SPR1 SPR0 Write: Reset: 00001000 $0012 SPI Data Register (SPDR) Read: R7 R6 R5 R4 R3 R2 R1 R0 Write: T7 T6 T5 T4 T3 T2 T1 T0 Reset: Unaffected by reset = Unimplemented R = Reserved Figure 15-1. SPI I/O Register Summary Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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