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ATTINY817-MFR. Datasheet(PDF) 111 Page - Microchip Technology

Part # ATTINY817-MFR.
Description  AVR짰 Microcontroller with Core Independent Peripherals and picoPower짰 Technology
PDF  492 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
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ATTINY817-MFR. Datasheet(HTML) 111 Page - Microchip Technology

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16.3.2
Operation
16.3.2.1 Basic Functions
Each I/O pin Pxn can be controlled by the registers in PORT x. Each pin group x has its own set of PORT
registers, the base address of the register set for pin n is at the byte address
PORT+0x10+��.The
index within that register set is n.
To use pin number n as an output only, write bit n of the PORT.DIR register to '1'. This can also be done
by writing bit n in the PORT.DIRSET register to '1' - this will avoid disturbing the configuration of other
pins in that group. The nth bit in the PORT.OUT register must be written to the desired output value.
Similarly, writing a PORT.OUTSET bit to '1' will set the corresponding bit in the PORT.OUT register to '1'.
Writing a bit in PORT.OUTCLR to '1' will clear that bit in PORT.OUT to zero. Writing a bit in
PORT.OUTTGL or PORT.IN to '1' will toggle that bit in PORT.OUT.
To use pin n as an input, bit n in the PORT.DIR register must be written to '0' to disable the output driver.
This can also be done by writing bit n in the PORT.DIRCLR register to '1' - this will avoid disturbing the
configuration of other pins in that group. The input value can be read from bit n in register PORT.IN as
long as the ISC bit is not set to INPUT_DISABLE.
Writing a bit to '1' in PORT.DIRTGL will toggle that bit in PORT.DIR, and toggle the direction of the
corresponding pin.
16.3.2.2 Virtual Ports
The Virtual Port registers map the most frequently used regular Port registers into the bit-accessible I/O
space. Writing to the Virtual Port registers has the same effect as writing to the regular registers, but
allows for memory-specific instructions, such as bit-manipulation instructions, which are not valid for the
extended I/O memory space where the regular Port registers reside.
Table 16-2. Virtual Port Mapping
Regular Port Register
Mapped to Virtual Port Register
PORT.DIR
VPORT.DIR
PORT.OUT
VPORT.OUT
PORT.IN
VPORT.IN
PORT.INTFLAG
VPORT.INTFLAG
Related Links
Register Summary - VPORT
I/O Multiplexing and Considerations
Peripherals and Architecture
16.3.2.3 Pin Configuration
The Pin n Configuration register (PORT.PINnCTRL) is used to configure inverted I/O, pullup, and input
sensing of a pin.
All input and output on the respective pin n can be inverted by writing a '1' to the Inverted I/O Enable bit
(INVEN) in PORT.PINnCTRL.
Toggling the INVEN bit causes an edge on the pin, which can be detected by all peripherals using this
pin, and is seen by interrupts or Events if enabled.
Pullup of pin n is enabled by writing a '1' to the Pullup Enable bit (PULLUPEN) in PORT.PINnCTRL.
ATtiny417/817
© 2017 Microchip Technology Inc.
Datasheet Complete
DS40001901B-page 111



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