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ATTINY817-MFR. Datasheet(PDF) 113 Page - Microchip Technology |
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ATTINY817-MFR. Datasheet(HTML) 113 Page - Microchip Technology |
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113 / 492 page  Property Synchronous or Partly Asynchronous Sense Support Full Asynchronous Sense Support configuration from sleep modes with Main Clock stopped. Interrupt "dead time" No new interrupt for three cycles after the previous No limitation Minimum Wakeup pulse length Value on pad must be kept until the system clock has restarted No limitation Related Links AVR CPU SREG 16.3.4 Sleep Mode Operation With the exception of interrupts and input synchronization, all pin configurations are independent of sleep mode. Peripherals connected to the Ports can be affected by sleep modes, described in the respective peripherals' documentation. The PORT peripheral will always use the Main Clock. Input synchronization will halt when this clock stops. 16.3.5 Synchronization Not applicable. 16.3.6 Configuration Change Protection Not applicable. ATtiny417/817 © 2017 Microchip Technology Inc. Datasheet Complete DS40001901B-page 113 |
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