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S32K311NHT0MPAST Datasheet(PDF) 102 Page - NXP Semiconductors |
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S32K311NHT0MPAST Datasheet(HTML) 102 Page - NXP Semiconductors |
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102 / 143 page ![]() Figure 50. MII transmit diagram 12.8.2 Ethernet MII (200 Mbps) The following timing specs are defined at the device I/O pin and must be translated appropriately to arrive at timing specs/ constraints for the physical interface. Measurements are with maximum output load of 25pF, input transition of 1ns and pad configured with DSE = 1'b1 and SRE = 1'b0. I/O operating voltage ranges from 2.97 V to 3.63 V. Valid pin combinations to be referred from K3xx*_Use sheet in IOmux. Table 53. Ethernet MII (200 Mbps) Symbol Description Min Typ Max Unit Condition Spec Number — RXCLK frequency — — 50 MHz — — MII1 RXCLK pulse width high 35 — 65 % RXCLK period — — MII2 RXCLK pulse width low 35 — 65 % RXCLK period — — MII3 RXD[3:0], RXDV, RXER to RXCLK setup time 4 — — ns — — MII4 RXCLK to RXD[3:0], RXDV, RXER hold time 2 — — ns — — — TXCLK frequency — — 50 MHz — — Table continues on the next page... NXP Semiconductors Communication interfaces S32K3xx Data Sheet, Rev. 9.1, 03/2024 Data Sheet: Technical Data Preliminary Information for S32K388 102 / 143 |
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