DP83266 datasheet(30/152 Pages) NSC

30 / 152 page

60 Functional Description (Service Engine) (Continued)

Request status is generated as a single confirmation object

(single- or multi-part) per Request object with each confir-

mation object consisting of one or more CNF Descriptors

The type of confirmation is specified by the host in the Con-

firmation Class field of the REQ Descriptor

The MACSI device can be programmed to generate CNF

Descriptors at the end of the Request object (End Confirma-

tion) or at the end of each token opportunity (Intermediate

Confirmation) as selected in the E and I bits of the Confir-

mation Class Field of the REQ Descriptor A CNF Descriptor

is always written when an exception or error occurs (regard-

less of the value in the Confirmation Class field) when a

Request is completed (for End or Intermediate Confirmation

Class) or when a Service Opportunity ends (Intermediate

Confirmation Class only)

There are three basic types of confirmation Transmitter

Full and None With Transmitter Confirmation the MACSI

device verifies that the Output Data Units were successfully

transmitted With Full Confirmation the Request Machine

verifies that the ODUs were successfully transmitted that

the number of (returning) frames ‘‘matches’’ the number of

transmitted ODUs and that the returning frames contain the

expected status Full confirmation takes advantage of the

fact that the sending station also removes its frames from

the network When the None Confirmation Class is select-

ed confirmation is written only if an exception or error oc-

curs

For Full Confirmation a matching frame must meet the fol-

lowing criteria

1 The frame has a valid Ending Delimiter (ED)

2 The selected bits in the FC fields of the transmitted and

received frames are equal (the selected bits are speci-

fied in the FCT bit of the Request Configuration Regis-

ter)

3 The frame is My

SA (MFLAG or both SAT

EM assert-

ed)

4 The frame status indicators match the values in the Ex-

pected Frame Status Register

5 FCS checking is disabled or FCS checking is enabled

and the frame has a valid FCS

6 All bytes from FC to ED have good parity (when the

FLOW bit in the Mode Register is set ie parity checking

is enabled)

The confirmed frame count starts after the first Request

burst frame has been committed by the Ring Engine and

when a frame with My

SA is received Void and My

Void

frames are ignored by the MACSI device The frame count

ends when any of the following conditions occur

1 All frames have been transmitted and the transmitted

and confirmed frame counts are equal

2 There is a MACRST (MAC Reset)

3 The state of the ring-operation has changed

4 A stripped frame or a frame with a parity error is re-

ceived

5 A non-matching frame is received

6 A token is received

When Source Address Transparency is selected (by setting

the SAT bit in the Request Configuration Register) and Full

confirmation is enabled confirmation begins when a frame

end is detected with either MFLAG or EM asserted

When a non-matching frame is received the MACSI device

ends the Request and generates the Request Complete

(RCM) Exception (EXC) and Breakpoint (BRK) attentions

Any remaining REQs in the Request object are fetched until

a REQLast or REQOnly is encountered Processing then

resumes on the next REQFirst or REQOnly (any other type

of REQ would be a consistency failure)

Request errors and exceptions are reported in the State

Attention Register Request Attention Register and the

Confirmation Message Descriptor When an exception or er-

ror occurs the Request Machine generates a CNF and

ends the Request The Unserviceable Request (USR) atten-

tion is set to block subsequent Requests once one be-

comes unserviceable

623 State Machines

There are three state machines under control of the host

the Request Machine

the Indicate Machine

and the

StatusSpace Machine Each Machine has two Modes

Stop and Run The Mode is determined by the setting of the

Machine’s corresponding STOP bit in the State Attention

an error occurs or may be set by the user to place the state

machine in Stop Mode

The MACSI device Control Registers may be programmed

only when all Machines are in Stop Mode When the Status

Space Machine is in Stop Mode only the Pointer RAM and

Limit RAM Registers may be programmed When the Indi-

cate and Request Machines are in Stop Mode all indicate

and request operations are halted When the StatusSpace

Machine is in Stop Mode only the PTOP and LMOP service

functions can be performed

63 EXTERNAL MATCHING INTERFACE

This interface consists of five pins (six on MACSI revision D

or later) that give the MACSI device additional status re-

garding address matches Typical applications for this inter-

face include address matching for Bridge and Router devic-

es The five pins include four inputs (ECIP ECOPY EA and

EM) and one output (LEARN) MACSI revisions D or later

have an additional input pin (AFINHIB) ECIP provides tim-

ing information to the Sytem Interface ECOPY and EM pro-

vide status to the System Interface on external Destination

and Source address matches respectively (most applica-

tions use ECOPY only) The Ring Engine uses EA and EM

for setting the A Indicator and frame stripping

For the purposes of external matching it is recommended

that the frame data be viewed at the PLAYERa MACSI

Receive interface (PIDk70l PIP PIC) In addition it is

recommended that the user design the circuit to detect the

JK symbol at the MACSIPLAYERa interface to start ad-

dress matching

To instruct the MACSI device to copy a frame the proper

use of the ECIP ECOPY and EM pins is as follows Exter-

nal address matching circuitry must assert ECIP some time

from the arrival of the start delimiter (JK) to the 6th byte of

the INFO field (as measured at the PLAYERa MACSI inter-

face) Otherwise the MACSI device assumes that no exter-

nal address comparison is taking place ECIP must be nega-

ted for at least one cycle to complete the external compari-

son If it has not been deasserted by the 2nd byte after the

End Delimiter (ED) the frame is not copied ECOPY and EM

are sampled on the clock cycle after ECIP is negated ECIP

is ignored after it is negated until the arrival of the next JK

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