DP83266 datasheet(45/152 Pages) NSC

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70 Control Information (Continued)

Table 7-2 MACSI Memory Map (BSI Registers)

Address

Access Rules

Reset

Value

Read

Write

114

Indicate Attention Register (IAR)

Always

Conditional

115

Indicate Notify Register (INR)

Always

116

Indicate Threshold Register (ITR)

Always

INSTOP Mode

or EXC e 1 Only

117

Indicate Mode Configuration Register (IMCR)

Always

INSTOP Mode

Only

118

Indicate Copy Configuration Register (ICCR)

Always

119

Indicate Header Length Register (IHLR)

Always

INSTOP Mode

or EXC e 1 Only

11A

Address Configuration Register (ACR)

Always

11B

Request Channel 0 Configuration Register 1 (R0CR1)

Always

11C

Request Channel 1 Configuration Register 1 (R1CR1)

Always

11D – 11E

Reserved

11F

System Interface Compare Register (SICMP)

Always

120 – 1FF

Reserved

Initialized to a System Interface Revision code upon reset The System Interface Revision code remains until it is overwritten by the host

NA e Not altered upon reset

NA e Not Applicable

The MAC Control Information Address Space is divided into

4 groups as shown in Table 7-3 An information summary is

given for each group followed by a detailed description of all

registers

MAC Operation Registers (Table 7-4)

MAC Event Registers (Table 7-5)

MAC Parameters (Table 7-6)

MAC CountersTimers (Table 7-7)

The System Interface Operation registers are accessed di-

rectly via the Control Bus Limit RAM Registers are ac-

cessed indirectly via the Control Bus using the Limit RAM

Data and Limit RAM Address Registers The Pointer RAM

Registers are accessed indirectly via the Control Bus and

ABus using the Pointer RAM Address and Control Register

the Mailbox Address Register and a mailbox location in

ABus memory Descriptors are fetched (or written) by the

MACSI device across the ABus

System Interface Registers (Table 7-8)

72 CONVENTIONS

When referring to multi-byte fields byte 0 is always the most

significant byte When referring to bits within a byte bit (7) is

the most significant bit and bit (0) is the least significant bit

When referring to the contents of a byte the most signifi-

cant bit is always referred to first When referring to a bit

within a byte the notation register

namebit

name is

used For example MCMR0RUN references the RUN bit in

MAC Mode Register 0

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