DP83266 datasheet(75/152 Pages) NSC

75 / 152 page

70 Control Information (Continued)

75 MAC PARAMETERS

The MAC Parameters are accessible in the Stop Mode These parameters are also accessible in the Run Mode when the

following conditions are met

a the MAC Transmitter is in state T0 T1 or T3 and

b bits ITC and IRR of the Option Register are set to One and

c bits CLM and BCN of the Function Register are set to Zero

Otherwise read and write accesses will cause a command error (bit CCE of the Exception Status Register is set to One) and the

access will not be performed

The MAC Parameters are stored in the MAC Parameter RAM They include the following control information

Individual Addresses My Long Address (MLA0–5) and My Short Address (MSA0–1)

Group Addresses Group Long Address (GLA0–4) and Group Short Address (GSA0) Programmable Group Map (PGM0–F)

and Fixed Group Map (FGM0 – 1)

MAC Frame Information Requested Target Token Rotation Time (TREQ0–3) and Transmit Beacon Type (TBT0–3)

751 Individual Addresses

The Ring Engine supports both Long and Short Individual Addresses simultaneously The Station’s Long Address is stored in

registers MLA0 – 5 The Station’s Short Address is stored in registers MSA0 – 1

For received frames MLA or MSA is compared with the received DA in order to set the Address recognized Flag (A

Flag) and

compared with the received SA in order to set the My Address recognized Flag (M

Flag) In transmitted frames MLA or MSA

normally replaces the SA from the frame data stream (exception when SA transparency is used)

Bits MLA(47) and MSA(15) are the most significant bits of the address and are transmitted and received first Bits MLA(0) and

MSA(0) are the least significant bits of the address and are transmitted and received last

MLA and MSA should be valid for at least 12 byte times before the Addressing Mode is enabled and should remain valid for at

least 12 byte times after the Addressing Mode is disabled in order to guarantee proper detection

Bits ELA (Enable Long Addressing) and ESA (Enable Short Addressing) in the Option Register determine the address types that

may be recognized and generated by this MAC

My Long Address (MLA0 – MLA5)

My Long Address (MLA0 – MLA5) represent this station’s long 48-bit address

Access Rules

Address

Read

Write

040–045h

Stop Mode

MLA0

MLA(47)

MLA(46)

MLA(45)

MLA(44)

MLA(43)

MLA(42)

MLA(41)

MLA(40)

MLA1

MLA(39)

MLA(38)

MLA(37)

MLA(36)

MLA(35)

MLA(34)

MLA(33)

MLA(32)

MLA2

MLA(31)

MLA(30)

MLA(29)

MLA(28)

MLA(27)

MLA(26)

MLA(25)

MLA(24)

MLA3

MLA(23)

MLA(22)

MLA(21)

MLA(20)

MLA(19)

MLA(18)

MLA(17)

MLA(16)

MLA4

MLA(15)

MLA(14)

MLA(13)

MLA(12)

MLA(11)

MLA(10)

MLA(9)

MLA(8)

MLA5

MLA(7)

MLA(6)

MLA(5)

MLA(4)

MLA(3)

MLA(2)

MLA(1)

MLA(0)

Note

MLA(47) should always be set to 0

My Short Address (MSA0 – MSA1)

My Short Address (MSA0 – MSA1) represent this station’s short 16-bit address

Access Rules

Address

Read

Write

046–047h

Stop Mode

MSA0

MSA(15)

MSA(14)

MSA(13)

MSA(12)

MSA(11)

MSA(10)

MSA(9)

MSA(8)

MSA1

MSA(7)

MSA(6)

MSA(5)

MSA(4)

MSA(3)

MSA(2)

MSA(1)

MSA(0)

Note

MSA(15) should always be set to 0

DP83266 Datasheet(PDF) 75 Page - National Semiconductor (TI)

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