MC68HC908AP16CFB datasheet(154/440 Pages) MOTOROLA

154 / 440 page

Monitor ROM (MON)

Data Sheet

MC68HC908AP Family — Rev. 2.5

154

MOTOROLA

•

959 bytes monitor ROM code size

($FC00–$FDFF and $FE10–$FFCE)

•

Monitor mode entry without high voltage, VTST, if reset vector is

blank ($FFFE and $FFFF contain $FF)

•

Standard monitor mode entry if high voltage, VTST, is applied to

IRQ1

•

Resident routines for in-circuit programming and EEPROM

emulation

10.3 Functional Description

The monitor ROM receives and executes commands from a host

computer. Figure 10-1 shows an example circuit used to enter monitor

mode and communicate with a host computer via a standard RS-232

interface.

Simple monitor commands can access any memory address. In monitor

mode, the MCU can execute code downloaded into RAM by a host

computer while most MCU pins retain normal operating mode functions.

All communication between the host computer and the MCU is through

the PTA0 pin. A level-shifting and multiplexing interface is required

between PTA0 and the host computer. PTA0 is used in a wired-OR

configuration and requires a pullup resistor.

The monitor code allows enabling the PLL to generate the internal clock,

provided the reset vector is blank, when the device is being clocked by

a low-frequency crystal. This entry method, which is enabled when IRQ1

is held low out of reset, is intended to support serial communication/

programming at 9600 baud in monitor mode by stepping up the external

frequency (assumed to be 32.768 kHz) by a fixed amount to generate

the desired internal frequency (2.4576 MHz). Since this feature is

enabled only when IRQ1 is held low out of reset, it cannot be used when

the reset vector is non-zero because entry into monitor mode in this case

requires VTST on IRQ1.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

MC68HC908AP16CFB Datasheet(PDF) 154 Page - Motorola, Inc

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