MC68HC908AP16CFB datasheet(155/440 Pages) MOTOROLA

155 / 440 page

Monitor ROM (MON)

Functional Description

MC68HC908AP Family — Rev. 2.5

Data Sheet

MOTOROLA

155

Figure 10-1. Monitor Mode Circuit

NOTES:

1. Monitor mode entry method:

SW2: Position C — High voltage entry (VTST); must use external OSC

Bus clock depends on SW1 (note 2).

SW2: Position D — Reset vector must be blank ($FFFE:$FFFF = $FF)

Bus clock = 2.4576MHz.

2. Affects high voltage entry to monitor mode only (SW2 at position C):

SW1: Position A — Bus clock = OSC1 ÷ 4

SW1: Position B — Bus clock = OSC1 ÷ 2

5. See Table 24-4 for VTST voltage level requirements.

HC908AP

RST

IRQ1

OSC1

OSC2

VSS

PTA0

6–30 pF

0.1

µF

32.768kHz

PTA1

VDD

0.1

µF

VDD

PTA2

VDD

10 k

PTB0

VDD

10 k

SW1

VREG

(SEE NOTE 2)

XTAL CIRCUIT

VDD

MAX232

V+

V–

VDD

10 k

C1+

C1–

C2+

C2–

µF

DB9

74HC125

1 k

VTST

VCC

GND

µF

8.5 V

10 k

CONNECT TO OSC1, WITH OSC2 UNCONNECTED.

MUST BE USED IF SW2 IS AT POSITION C.

OSC1

(SEE NOTE 1)

SW2

330k

10k

0.033

µF

0.01

µF

CGMXFC

VDDA

VREFL

VSSA

EXT OSC

4.9152MHz/9.8304MHz

(50% DUTY)

VREFH

VREG

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

MC68HC908AP16CFB Datasheet(PDF) 155 Page - Motorola, Inc

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