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ATTINY817-MFR. Datasheet(PDF) 134 Page - Microchip Technology

Part # ATTINY817-MFR.
Description  AVR짰 Microcontroller with Core Independent Peripherals and picoPower짰 Technology
PDF  492 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

ATTINY817-MFR. Datasheet(HTML) 134 Page - Microchip Technology

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19.
WDT - Watchdog Timer
19.1
Features
•
Issues a System Reset if the Watchdog Timer is not cleared before its timeout period
•
Operating asynchronously from system clock using an independent oscillator
•
Using the 1KHz output of the 32KHz Ultra Low Power oscillator (OSCULP32K)
•
11 selectable timeout periods, from 8ms to 8s
•
Two operation modes:
–
Normal Mode
–
Window Mode
•
Configuration lock to prevent unwanted changes
•
Closed period timer activation after first WDT instruction for easy setup
19.2
Overview
The Watchdog Timer (WDT) is a system function for monitoring correct program operation. It allows to
recover from situations such as runaway or deadlocked code, by issuing a Reset. When enabled, the
WDT is a constantly running timer configured to a predefined timeout period. If the WDT is not reset
within the timeout period, it will issue a System Reset. The WDT is reset by executing the WDR (Watchdog
Timer Reset) instruction from software.
The WDT has two modes of operation, Normal mode and Window mode. The settings in the Control A
register (WDT.CTRLA) determine the mode of operation.
A window mode allows to define a time slot or "window" inside the timeout period during which the WDT
must be reset. If the WDT is reset outside this window, either too early or too late, a System Reset will be
issued. Compared to the normal mode, the window mode can also catch situations where a code error
causes constant WDR execution.
When enabled, the WDT will run in active mode and all sleep modes. It is asynchronous, i.e. running from
a CPU-independent clock source. For this reason it will continue to operate and be able to issue a
System Reset even if the main clock fails.
The Configuration Change Protection mechanism ensures that the WDT settings cannot be changed by
accident. For increased safety, a configuration for locking the WDT settings is also available.
Related Links
CCP - Configuration Change Protection
ATtiny417/817
© 2017 Microchip Technology Inc.
Datasheet Complete
DS40001901B-page 134



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