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ATTINY817-MFR. Datasheet(PDF) 165 Page - Microchip Technology |
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ATTINY817-MFR. Datasheet(HTML) 165 Page - Microchip Technology |
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165 / 492 page  20.5.13 Temporary bits for 16-bit Access The Temporary register is used by the CPU for single-cycle, 16-bit access to the 16-bit registers of this peripheral. It can also be read and written by software. See also Accessing 16-bit Registers. There is one common Temporary register for all the 16-bit registers of this peripheral. Name: TEMP Offset: 0x0F Reset: 0x00 Property: - Bit 7 6 5 4 3 2 1 0 TEMP[7:0] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0 Bits 7:0 – TEMP[7:0]: Temporary Bits for 16-bit Access 20.5.14 Counter Register - Normal Mode The TCA.CNTL and TCA.CNTH register pair represents the 16-bit value, TCA.CNT. The low byte [7:0] (suffix L) is accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01. For more details on reading and writing 16-bit registers, refer to Accessing 16-bit Registers. CPU and UPDI write access has priority over internal updates of the register. Name: CNT Offset: 0x20 Reset: 0x00 Property: - Bit 15 14 13 12 11 10 9 8 CNT[15:8] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 CNT[7:0] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0 Bits 15:8 – CNT[15:8]: Counter high byte These bits hold the MSB of the 16-bit counter register. Bits 7:0 – CNT[7:0]: Counter low byte These bits hold the LSB of the 16-bit counter register. 20.5.15 Period Register - Normal Mode TCA.PER contains the 16-bit TOP value in the timer/counter. ATtiny417/817 © 2017 Microchip Technology Inc. Datasheet Complete DS40001901B-page 165 |
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