ATTINY817-MFR. datasheet(162/492 Pages) MICROCHIP

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Bit

CMP2BV

CMP1BV

CMP0BV

PERBV

Access

R/W

Reset

Bit 3 – CMP2BV: Compare 2 Buffer Valid

See CMP0BV.

Bit 2 – CMP1BV: Compare 1 Buffer Valid

See CMP0BV.

Bit 1 – CMP0BV: Compare 0 Buffer Valid

The CMPnBV bits are set when a new value is written to the corresponding CMPnBUF register. These

bits are automatically cleared on an UPDATE condition.

Bit 0 – PERBV: Period Buffer Valid

This bit is set when a new value is written to the PERB register. This bit is automatically cleared on an

UPDATE condition.

20.5.8

Control Register F Set

The individual status bit can be set by writing a one to its bit location. This allows each bit to be set

without use of a read-modify-write operation on a single register.

Name:

CTRLFSET

Offset: 0x07

Reset:

0x00

Property:

Bit

CMP2BV

CMP1BV

CMP0BV

PERBV

Access

R/W

Reset

Bit 3 – CMP2BV: Compare 2 Buffer Valid

See CMP0BV.

Bit 2 – CMP1BV: Compare 1 Buffer Valid

See CMP0BV.

Bit 1 – CMP0BV: Compare 0 Buffer Valid

The CMPnBV bits are set when a new value is written to the corresponding CMPnBUF register. These

bits are automatically cleared on an UPDATE condition.

Bit 0 – PERBV: Period Buffer Valid

This bit is set when a new value is written to the PERB register. This bit is automatically cleared on an

UPDATE condition.

20.5.9

Event Control

ATtiny417/817

Datasheet Complete

DS40001901B-page 162

ATTINY817-MFR. Datasheet(PDF) 162 Page - Microchip Technology

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