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MCP37D11-80E/TE Datasheet(PDF) 2 Page - Microchip Technology |
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MCP37D11-80E/TE Datasheet(HTML) 2 Page - Microchip Technology |
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2 / 136 page  MCP37D11-80: 80 MSPS 12-BIT PIPELINED ADC DS20006381A-page 2 2020 Microchip Technology Inc. Functional Block Diagram Output Control: Reference Generator SENSE VCM AIN0+ AIN0- CLK+ CLK- Q OVR SCLK CS SDIO AIN7+ AIN7- DCLK+ DCLK- VREF+ VREF- WCK Pipelined PLL Clock - Serialized LVDS Output Clock Control Configuration Registers ADC Digital Signal Post-Processing: - CMOS, DDR LVDS REF0- AVDD12 AVDD18 DVDD18 DVDD12 REF0+ REF1- REF1+ DLL Duty Cycle Correction Selection - Phase/Offset/Gain Adjustment GND [11:0] - Continuous Wave (CW) Beamforming - Fractional Delay Recovery (FDR) - Digital Down-Converter (DDC) - Decimation Filter Data Output (Selectable using Configuration Register Bits) - Noise-Shaping Requantizer (NSR) VBG SYNC SLAVE Note 1 Note 1: All external circuit components for REF0/1 and VBG pins are already embedded in the TFBGA-121 package. |
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