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MCP37D11-80E/TE Datasheet(PDF) 68 Page - Microchip Technology

Part # MCP37D11-80E/TE
Description  80 Msps, 12-Bit High-Pre cision Pipelined ADC
PDF  136 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP37D11-80E/TE Datasheet(HTML) 68 Page - Microchip Technology

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MCP37D11-80: 80 MSPS 12-BIT PIPELINED ADC
DS20006381A-page 68
 2020 Microchip Technology Inc.
4.12.12.1
Pseudo-Random Number (PN)
Sequence Output
When TEST_PATTERNS<2:0> = 111, the device
outputs a pseudo-random number (PN) sequence
which is defined by the polynomial of degree 16, as
shown in Equation 4-11. Figure 4-27 shows the block
diagram of a 16-bit Linear Feedback Shift Register
(LFSR) for the PN sequence.
EQUATION 4-11:
POLYNOMIAL FOR PN
The output PN[15:4] is directly applied to the output
pins Qn[11:0]. In addition to the output at the Qn[11:0]
pins, the two MSbs, PN[15] and PN[14], are copied to
the OVR and WCK pins, respectively.
FIGURE 4-27:
Block Diagram of 16-Bit LFSR
for Pseudo-Random Number (PN) Sequence for
Output Test Pattern
.
4.13
System Calibration
The built-in system calibration algorithm includes:
• Harmonic Distortion Correction (HDC)
• DAC Noise Cancellation (DNC)
• Dynamic Element Matching (DEM)
HDC and DNC correct the nonlinearity in the residue
amplifier
and
DAC,
respectively. The
system
calibration is performed by:
• Power-up calibration, which takes place during
the Power-on Reset sequence (requires 227 clock
cycles)
• Background calibration, which takes place during
normal operation (per 230 clock cycles).
Background calibration time is invisible to the user,
and primarily affects the ADC's ability to track
variations in ambient temperature.
The calibration status is monitored by the CAL pin or
the ADC_CAL_STAT bit in Address 0xC0 (Register 5-
80). See Address 0x07 (Register 5-5) and 0x1E
(Register 5-6) for time delay control of the auto-
calibration. Table 4-25 shows the calibration time for
various ADC core sample rates.
4.13.1
RESET COMMAND
Although the background calibration will track changes
in temperature or supply voltage, changes in clock
frequency or register configuration should be followed
by a recalibration of the ADC. This can be
accomplished via either the Hard or Soft Reset
command. The recalibration time is the same as the
power-up calibration time (227 clock cycles). Resetting
the device is highly recommended when exiting from
Shutdown or Standby mode after an extended amount
of time. During the reset, the device has the following
state:
• No ADC output
• No change in power-on condition of internal
reference
• Most of the internal clocks are not distributed
• Contents of internal user registers:
- Not affected by Soft Reset
- Reset to default values by Hardware Reset
• Current consumption of the digital section is
negligible, but no change in the analog section.
Px

1x
4
x
13
x
15
x
16
+
+++
=
Z-4
Z-9
Z-2
Z-1
XOR
PN[3]
PN[12]
PN[14]
PN[15]
TABLE 4-25:
CALIBRATION TIME VS. ADC
CORE SAMPLE RATE
fS (Msps)
90
80
70
60
50
Power-Up
Calibration Time1(sec)
1.5
1.7
1.9
2.2
2.7
Refresh Time (sec) of Back-
ground Calibration2
11.9 13.4 15.3 17.9 21.5
Note 1:
It takes 227 clock cycles.
2:
It takes place every 230 clock cycles by itself during
normal operation.



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