MCP37D11-80ESLASHTE datasheet(3/136 Pages) MICROCHIP

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DS20006381A-page 3

MCP37D11-80: 80 MSPS 12-BIT PIPELINED ADC

Description

The MCP37D11-80 is an 80 Msps, 12-bit high-

precision pipelined analog-to-digital converter with

configurable input MUX.

A built-in 8-input multiplexer (MUX) is used to select the

active analog input(s) depending on the user

configuration. In single-channel operation, the MUX

can be configured to select one of the 8-inputs. In multi-

channel operation, the selected inputs are sequentially

sampled. The input channel selection and the channel

order are configured using the user-programmable

configuration register bits.

The ADC core operates at up to an 80 Msps rate. In

single-channel operation, the analog input is sampled

at full speed. In multi-channel operation, the effective

sample rate per channel is the full speed divided by the

number of selected channels. For example, if all 8-input

channels are used, each input channel is sampled at

10 Msps when the ADC core is running at 80 Msps.

Similarly, if only 4-input channels are selected, each

input channel is sampled at 20 Msps when the ADC

core is running at 80 Msps.

The device features harmonic distortion correction,

DAC noise cancellation, power-up calibration, and

always-on background calibration which enable high

performance to be maintained consistently across the

extended temperature range.

In addition to the data conversion, the device offers

exceptional user-selectable built-in digital signal post-

processing (DSPP) features that include high-order

digital decimation filters, digital down-conversion

(DDC), fractional delay recovery (FDR), noise-shaping

requantizer (NSR), gain and offset adjustment per

channel, and continuous wave (CW) beamforming

capability.

SNR can be significantly improved by enabling the

decimation filter and/or noise-shaping requantizer

(NSR) options. The digital down-conversion (DDC)

option can offer great flexibility in advanced RF and

digital communication system designs.

Gain, phase and DC offset can be adjusted

independently for each input channel, allowing for

simplified implementation of continuous wave (CW)

beamforming

and

ultrasound

Doppler

imaging

applications.

In dual or octal-channel mode, the Fractional Delay

Recovery (FDR) feature digitally corrects the difference

in sampling instance between different channels, so

that all inputs appear to have been sampled at the

same time.

In single or dual-channel mode, the Noise-Shaping

Requantizer (NSR) feature can allow the ADC to

improve SNR beyond a conventional 12-bit ADC. The

NSR reshapes the quantization noise, such that most

of the noise power is pushed outside the frequency of

interest. As a result, SNR is improved significantly

within a selected frequency band of interest while

SFDR is not affected.

The differential full-scale analog input range is

programmable up to 2.975 VP-P.

The ADC output data can be coded in two's

complement or offset binary representation, with or

without the data randomizer option. The output data is

available as full-rate CMOS or Double-Data-Rate

(DDR) LVDS.

The device also includes various features designed to

maximize flexibility in the user’s applications and

minimize system cost, such as a programmable PLL

clock, output data rate control and phase alignment,

and programmable digital pattern generation. The

device’s operational modes and feature sets are

configured using the user-programmable registers.

AutoSync mode offers a great design flexibility when

multiple devices are used in applications. It allows

multiple devices to sample input synchronously at the

same clock source.

The high dynamic performance with built-in digital

signal post-processing features makes the device ideal

for various high-performance data acquisition systems,

including

communications

and

test

equipment,

ultrasound imaging equipment, Lidar, Radar and

portable instrumentation.

The device is available in a lead-free TFBGA-121

package. The device is AEC-Q100 qualified for

automotive applications and operates over the

extended temperature range of -40°C to +125°C.

Package Type

TFBGA-121 Package

Bottom View

Dimension: 8 mm x 8 mm x 1.08 mm

Ball Pitch: 0.65 mm

Ball Diameter: 0.4 mm

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