MCP37D31-80ESLASHTE datasheet(59/141 Pages) MICROCHIP

59 / 141 page

MCP37D31-80 AND MCP37D21-80

DS20006382A-page 59

 2020 Microchip Technology Inc.

4.8.3.6

NCO Phase Offset Control

The user can add phase offset to the NCO frequency

using the NCO phase offset control registers

(Addresses 0x86 to 0x95, Registers 5-46 – 5-61).

CH(n)_NCO_PHASE<15:0> is the 16-bit-wide NCO

phase offset control parameter for Channel n. A

0x0000 value in the register corresponds to no offset,

and a 0xFFFF corresponds to an offset of 359.995°.

The phase offset can be controlled with 0.005° per

step. The following equation is used to program the

NCO phase offset register:

EQUATION 4-6:

NCO PHASE OFFSET

A decimal number is used for the binary contents of

CH(n)_NCO_PHASE<15:0>.

4.8.3.7

In-Phase and Quadrature Signals

When the first down-conversion is enabled, it produces

In-phase (I) and Quadrature (Q) components as shown

in Equation 4-7:

EQUATION 4-7:

I AND Q SIGNALS

I and Q outputs are interleaved where I data is output

on the rising edge of the WCK. If I and Q outputs are

selected in dual-channel mode with DDC enabled, I

data of Channel 0 is output at the rising edge of WCK,

followed by Q data of Channel 0, then I and Q data of

Channel 1 in the same way.

4.8.3.8

Half-Band Filter

The frequency translation is followed by a half-band

digital filter, which is used to reduce the sample rate by

a factor of two while rejecting aliases that fall into the

band of interest.

The user can select high- or low-pass half-band filter

using the HBFILTER_A and HBFILTER_B bits in

Address 0x80 (Register 5-40). These filters provide

greater than 90 dB of attenuation in the attenuation

band and less than 1 mdB (10-3 dB) of ripple in the

passband region of 20% of the input sampling rate.

For example, for an ADC sample rate of 80 MSPS,

these filters provide less than 1 mdB of ripple over a

bandwidth of 16 MHz.

The filter responses shown in Figures 4-15 and 4-16

indicate a ripple of 0.5 mdB and an alias rejection of

90 dB. The output of the half-band filter is a DC-cen-

tered complex signal (I and Q). This I and Q signal is

then carried to the next down-conversion stage

(DDC2) for frequency translation (up-conversion), if

the DDC is enabled.

FIGURE 4-19:

High-Pass (HP) Response

of Half-Band Filter.

FIGURE 4-20:

Low-Pass (LP) Response of

Half-Band Filter.

CH(n)_NCO_PHASE<15:0>

Offset Value (

 

360

---------------------------------------



Where:

n = channel number

Offset Value (

) = desired phase offset value in

degrees

where:

(a)

(b)

IADC COS 2

f

NCOt







QADC SIN 2

f

NCOt







(c)



360

CH(n)_NCO_PHASE<15:0>

-----------------------------------------------------------------------



0.005493164

 CH(n)_NCO_PHASE<15:0>



where:

ADC = output of the ADC block

 = NCO phase offset of selected channel, which

is defined by CH(n)_NCO_PHASE<15:0> in

Addresses 0x86 - 0x95

t = k/fS, with k =1, 2, 3,..., n

fNCO = NCO frequency

Note:

The half-band filter delays the data output

by 80 clock cycles: 2 (due to decimation) x

40 cycles (due to group delay)

In-Band Ripple

0.0005

-0.0005

-30

-60

-90

-120

0.1

0.2

0.3

0.4

0.5

Half-Band Filter Frequency Response

0.1

0.2

0.3

0.4

0.5

Fraction of Input Sample Rate

In-Band Ripple

0.0005

-0.0005

-30

-60

-90

-120

0.1

0.2

0.3

0.4

0.5

Half-Band Filter Frequency Response

0.1

0.2

0.3

0.4

0.5

Fraction of Input Sample Rate

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