MCP37D31-80ESLASHTE datasheet(92/141 Pages) MICROCHIP

92 / 141 page

 2020 Microchip Technology Inc.

DS20006382A-page 92

MCP37D31-80 AND MCP37D21-80

ADDRESS 0X5C – PLL LOOP FILTER CAP1

U-0

R/W-0

R/W-1

R/W-0

R/W-1

—

FCB<1:0>

PLL_CAP1<4:0>

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

Unimplemented: Not used.

bit 6-5

FCB<1:0>: Factory-Controlled Bits. This is not for the user. Do not change default settings.

bit 4-0

PLL_CAP1<4:0>: Capacitor 1 value selection bits for PLL loop filter(1)

11111 = Maximum value

• • •

00111= (Default)

• • •

00000 = Minimum value

Note

This capacitor is located between the charge pump output and ground, and in parallel with the shunt resistor which is defined by

the PLL_RES<4:0>. The capacitor value increases linearly with the bit settings, from minimum to maximum values. This setting

should be set based on the phase detector comparison frequency.

ADDRESS 0X5D – PLL LOOP FILTER CAP2

U-0

R/W-0

R/W-1

R/W-0

R/W-1

—

FCB<1:0>

PLL_CAP2<4:0>

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

Unimplemented: Not used.

bit 6-5

FCB<1:0>: Factory-Controlled Bits. This is not for the user. Do not change default settings.

bit 4-0

PLL_CAP2<4:0>: Capacitor 2 value selection bits for PLL loop filter(1)

11111 = Maximum value

• • •

00111= (Default)

• • •

00000 = Minimum value

Note

This capacitor is located between the charge pump output and ground, and in parallel with CAP1 which is defined by the PLL_-

CAP1<4:0>. The capacitor value increases linearly with the bit settings, from minimum to maximum values. This setting should

be set based on the phase detector comparison frequency.

MCP37D31-80E/TE Datasheet(PDF) 92 Page - Microchip Technology

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