DP83266 datasheet(102/152 Pages) NSC

102 / 152 page

70 Control Information (Continued)

Request Attention Register (RAR)

The Request Attention Register (RAR) is used to present exception breakpoint request complete and unserviceable request

attentions generated by each Request Channel Each bit may be enabled by setting the corresponding bit in the Request Notify

All bits in this register are set to Zero upon reset

Access Rules

Address

Read

Write

10Eh

Always

Conditional

USRR0

RCMR0

EXCR0

BRKR0

USRR1

RCMR1

EXCR1

BRKR1

Bit

Symbol

Description

BRKR1

Breakpoint on RCHN1

Is set by the MACSI device when a CNF Descriptor is written on RCHN1 No action is

taken by the MACSI device if the host sets this bit

EXCR1

Exception on RCHN1

Is set by the MACSI device when an exception occurs on RCHN1 An exception

condition consists of one of the following events ABus Error Consistency Failure (REQ or ODUD) BMAC

MAC Reset Timeout (TRT expires) BMAC abort (MAC frame received or FCRequest Class inconsistency)

RINGOP change host abort (via SAR register) FIFO underrun or confirmation exception (for full

Confirmation) No action is taken by the MACSI device if the host sets this bit

This bit indicates that a request on RCHN1 did not complete normally This implies that an exception event

occurred or that the Request is improperly formed The corresponding Confirmation (CNF) Descriptor will give

more status about the failure The additional information in the CNF descriptor should be used to make a

decision about the severity of the error If the exception was caused by an ABus error the RQSTOP will also

be set

RCMR1

Request Complete on RCHN1

Is set by the MACSI device when it has completed processing a Request

object on RCHN1 (note that the MACSI may set this bit before writing the CNF descriptor to the CNF queue)

This completion may be a normal completion where a request object was transmitted without error It may also

be an abnormal completion due to one of the exception conditions listed above in EXCR1 No action is taken if

the Host sets this bit

USRR1

Unserviceable Request on RCHN1

Is set by the MACSI device when a Request cannot be processed on

RCHN1 This occurs when the Request Class is inappropriate for the current ring state (eg Asynchronous

transmission while RINGOP e 0) or when there is no CNF status space or when the host aborts a request by

clearing the ABR bit in the Service Attention Register While this bit is set no requests will be processed on

RCHN1

The host must clear this bit to resume request processing If the USRR1 was set due to lack of CNF space this

condition must be corrected by giving the MACSI device more CNF space before restarting the channel If it

was due to a request classRINGOP incompatibility then the reason for the incompatibility must be resolved

BRKR0

Breakpoint on RCHN0

Is set by the MACSI device when a CNF Descriptor is written on RCHN0 No action is

taken by the MACSI device if the host sets this bit

102

DP83266 Datasheet(PDF) 102 Page - National Semiconductor (TI)

DP83266 Datasheet(HTML) 102 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL