DP83266 datasheet(106/152 Pages) NSC

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70 Control Information (Continued)

Bit

Symbol

Description

PRE

PreemptPrestage

When this bit is set preemption is enabled for RCHN0 and prestaging is enabled for

RCHN1 (prestaging is always enabled for RCHN0) When this bit is Zero preemption is disabled and

Prestaging is enabled on the RCHN0

When preemption is enabled RCHN0 preempts a (non-committed) frame of RCHN1 already in the FIFO

causing it to be purged and refetched after RCHN0’s request has been serviced When the Request

Machine servicing on RCHN1 and a request on RCHN0 becomes active if preemption is enabled on

RCHN0 the Request Machine will finish transmitting the current frame on RCHN1 then release the token

and move back to the start state This has the effect of reprioritization of the Request Channels thus

ensuring that frames on RCHN0 are transmitted at the next service opportunity When RCHN0 has been

serviced transmission will continue on RCHN1 with no loss of data

When prestaging is enabled the next frame for RCHN1 is staged (ODUs are loaded into the FIFO before

the token arrives) If prestaging is not enabled the Request Machine waits until the token is captured

before staging the first frame Once the token is captured the Request Machine begins fetching data and

when the FIFO threshold has been reached transmits the data on the Request Channel For requests with

an Immediate service class prestaging is not applicable

When this bit is Zero preemption is disabled for RCHN0 and request on RCHN1 will not be prestaged

unless the HLD bit is Zero in which case RCHN1 will prestage data regardless of the setting of the PRE

bit

Note that when prestaging is not enabled on RCHN1 data is not staged until the token is captured Since

there is no data in the FIFO (if there is no active request on RCHN0) the MACSI device will immediately

release the token if the HLD option is not set

D7–D6

TT1–0

Transmit Threshold

These bits in conjunction with the EFT bit determine the threshold on the output

data FIFO before the MACSI device requests transmission See ‘‘Request Channel 0 and 1 Configuration

Registers 1 (R0CR1 and R1CR1)’’

TT1

TT0

Threshold Value

8 Words or 512 Words

16 Words or Reserved

128 Words or Reserved

256 Words or End of Frame

106

DP83266 Datasheet(PDF) 106 Page - National Semiconductor (TI)