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DP83266 Datasheet(PDF) 118 Page - National Semiconductor (TI) |
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DP83266 Datasheet(HTML) 118 Page - National Semiconductor (TI) |
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118 / 152 page  70 Control Information (Continued) Access Rules Group Address Register Name Read Write 00 ODU Pointer RCHN1 (OPR1) Always Always 01 ODUD List Pointer RCHN1 (OLPR1) Always Always 02 CNF Queue Pointer RCHN1 (CQPR1) Always Always 03 REQ Queue Pointer RCHN1 (RQPR1) Always Always 04 ODU Pointer RCHN0 (OPR0) Always Always 05 ODUD List Pointer RCHN0 (OLPR0) Always Always 06 CNF Queue Pointer RCHN0 (CQPR0) Always Always 07 REQ Queue Pointer RCHN0 (RQPR0) Always Always 08 IDU Pointer ICHN2 (IPI2) Always Always 09 IDUD Queue Pointer ICHN2 (IQPI2) Always Always 0A PSP Queue Pointer ICHN2 (PQPI2) Always Always 0B Next PSP ICHN2 (NPI2) Always Always 0C IDU Pointer ICHN1 (IPI1) Always Always 0D IDUD Queue Pointer ICHN1 (IQPI1) Always Always 0E PSP Queue Pointer ICHN1 (PQPI1) Always Always 0F Next PSP ICHN1 (NPI1) Always Always 10 IDU Pointer ICHN0 (IPI0) Always Always 11 IDUD Queue Pointer ICHN0 (IQPI0) Always Always 12 PSP Queue Pointer ICHN0 (PQPI0) Always Always 13 Next PSP ICHN0 (NPI0) Always Always 14 IDUD Shadow Register (ISR) Always Always 15 ODUD Shadow Register (OSR) Always Always 16–1F Reserved NA NA Note Bit position D2 of these Pointer RAM Locations is always forced to a 1 (The first word of a PSP is not fetched) FIGURE 7-3 Pointer RAM Registers Access Rules Group Address Register Name Read Write 0 REQ Queue Limit RCHN1 (RQLR1) Always Always 1 CNF Queue Limit RCHN1 (CQLR1) Always Always 2 REQ Queue Limit RCHN0 (RQLR0) Always Always 3 CNF Queue Limit RCHN0 (CQLR0) Always Always 4 IDUD Queue Limit ICHN2 (IQLI2) Always Always 5 PSP Queue Limit ICHN2 (PQLI2) Always Always 6 IDUD Queue Limit ICHN1 (IQLI1) Always Always 7 PSP Queue Limit ICHN1 (PQLI1) Always Always 8 IDUD Queue Limit ICHN0 (IQLI0) Always Always 9 PSP Queue Limit ICHN0 (PQLI0) Always Always A-F Reserved NA NA FIGURE 7-4 Limit RAM Registers 118 |
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