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DP83266 Datasheet(PDF) 127 Page - National Semiconductor (TI) |
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DP83266 Datasheet(HTML) 127 Page - National Semiconductor (TI) |
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127 / 152 page ![]() 70 Control Information (Continued) Bit Symbol Description Word 0 (Continued) D27 – D24 FRA Frame Attributes This field is valid only for Full Confirmation D25 – D24 TC Termination Condition 00 Other (eg MAC Resettoken) 01 ED 10 Format error 11 Frame stripped D26 AFLAG AFLAG Reflects the state of the AFLAG input signal which is sampled by the MACSI device at INFORCVD 0 No DA Match 1 DA Match D27 MFLAG MFLAG Reflects the state of the MFLAG input signal which is sampled by the MACSI device at INFORCVD 0 Frame Sent by another station 1 Frame Sent by this station D31 – D28 RS Request Status This field represents a priority encoded status value with the highest number having the highest priority This field is described in Figure 7-8 RS3 RS2 RS1 RS0 Meaning D31 D30 D29 D28 Intermediate 0000 None 0001 Preempted 0010 Part Done Breakpoints 0011 Service Loss 0100 Reserved Completion 0101 Completed Beacon 0110 Completed OK Exception Completion 0111 Bad Confirmation 1000 Underrun 1001 Host Abort 1010 Bad Ringop 1011 MAC Abort 1100 Timeout 1101 MAC Reset 1110 Consistency Failure Error 1111 Internal or Fatal ABus Error 127 |
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