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DP83266 Datasheet(PDF) 128 Page - National Semiconductor (TI) |
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DP83266 Datasheet(HTML) 128 Page - National Semiconductor (TI) |
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128 / 152 page  70 Control Information (Continued) Bit Symbol Description Word 1 D7 – D0 RES Reserved D15–D8 CS Confirmation Status D9–D8 FT Frame Type This field reflects the type of frame that ended Full Confirmation 00 Any Other 01 Token 10 Other Void 11 My Void D10 F Full Confirm This bit is set when the Request was for Full Conformation D11 U Unexpected Frame Status This bit is set when the frame status does not match the value programmed in the Request Expected Frame Status Register This applies only to Full Confirmation D12 P Parity This bit is set when a parity error is detected in a received frame Parity is checked from FC to ED inclusive if the FLOW bit in the Mode Register is set D13 E Exception This bit is part of the MACSI’s hierarchical status reporting It is set when an exception occurs during confirmation An exception is any one of the nine error or exception codes described in the RS Field The RCHN’s EXC bit in the Request Attention Register is also set D14 R Ring-Op This bit is set when the ring changes operational state after transmission but before all returning frames have been confirmed D15 T Transmit Class 0 Restricted 1 Non-Restricted D23 – D16 FC Frame Control Frame Control field of the last frame of the last confirmed burst Valid only for Full Confirmation D29 – D24 UID User Identification Contains the UID field copied from the current REQFirst or REQOnly D31 – D30 F-L FirstLast Tag Identifies the CNF part ie Only First Middle or Last FL e 10 e First FL e 00 e Middle FL e 01 e Last FL e 11-Only 128 |
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