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BLUENRG-1 Datasheet(PDF) 85 Page - STMicroelectronics

Part # BLUENRG-1
Description  Bluetooth low energy wireless system-on-chip
PDF  173 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

BLUENRG-1 Datasheet(HTML) 85 Page - STMicroelectronics

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BlueNRG-1
Functional details
DocID028866 Rev 1
85/173
Address
offset
Name
RW
Reset
Description
0x24
DMAR
RW
0x00000000
I2C DMA register. Refer to the detailed
description below.
0x28
BRCR
RW
0x00000008
I2C baud-rate counter register. Refer to
the detailed description below.
0x2C
IMSCR
RW
0x00000000
I2C interrupt mask set/clear register.
Refer to the detailed description below.
0x30
RISR
R
0x00000013
I2C raw interrupt status register. Refer to
the detailed description below.
0x34
MISR
R
0x00000000
I2C masked interrupt status register.
Refer to the detailed description below.
0x38
ICR
RW
0x00000000
I2C interrupt clear register. Refer to the
detailed description below.
0x4C
THDDAT
RW
0x00000014
I2C hold time data. Refer to the detailed
description below.
0x50
THDSTA_FST_STD
RW
0x003F00E2
I2C hold time start condition F/S. Refer to
the detailed description below.
0x54
RESERVED
RW
0x00000019
RESERVED
0x58
TSUSTA_FST_STD
RW
0x001D00E2
I2C setup time start condition F/S. Refer
to the detailed description below.
Table 92: I2C - CR register description: address offset I2CX_BASE_ADDR+0x00
Bit
Field name
Reset
RW
Description
0
PE
0x0
RW
I2C enable disable:
0: I2C disable.
1: I2C enable.
This bit when deasserted works as software Reset for I2C
peripheral.
2:1
OM
0x0
RW
Select the operating mode:
00b: Slave mode. The peripheral can only respond
(transmit/receive) when addressed by a master device
01b: Master mode. The peripheral works in a multi-master
system where itself cannot be addressed by another master
device. It can only initiate a new transfer as master device.
10b: Master/slave mode. The peripheral works in a multi-
master system where itself can be addressed by another
master device, besides to initiate a transfer as master
device.
3
SAM
0x0
RW
Slave addressing mode. SAM defines the slave addressing
mode when the peripheral works in slave or master/slave
mode. The received address is compared with the content of
the register SCR.
0: 7-bit addressing mode.
1: 10-bit addressing mode.



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